Stacked Die Semiconductor Package with Interposer and Direct Wire Bonding
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Solution Overview
Problem
Existing BGA semiconductor packages face challenges in achieving high interconnection density with minimal footprint area, often resulting in bulkier packages and wire routing issues, especially when dealing with smaller dies that require high interconnection densities, leading to safety risks and electrical performance degradation.
Innovation Solution
A stacked die semiconductor package configuration where a substrate supports a high-density small die, which in turn supports a larger die, with the top die directly connected to an underlying die via wire connections, optionally using interposers to manage die stacking and reduce footprint area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high interconnection density is achieved with more solder balls in a given footprint, then the number of interconnections increases, but the package footprint area increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of interconnections to a three-dimensional stacked die configuration. Multiple dies are stacked vertically with interconnections routed through intermediate substrates and via holes, enabling high interconnection density without increasing the package footprint area. The vertical stacking allows interconnections to extend in the Z-dimension, effectively resolving the contradiction between connection quantity and footprint area.
2Length of moving object
If the distance between bond pads and ball pads is reduced to minimize wire length, then wire routing efficiency improves, but adequate clearance for wire bonding becomes insufficient
Solution Approach 1:
The patent divides the interconnection path into multiple segments: bond pads on the die, wire bonds to intermediate substrates, via holes through substrates, and ball pads on underlying dies. This segmentation allows each segment to be optimized independently - wire lengths are minimized within constraints while adequate clearance is maintained at bonding locations through strategic placement of intermediate substrates and via holes.
Solution Approach 2:
Intermediate substrates act as mediators between bond pads and ball pads, providing additional bonding locations and routing paths. These substrates enable wire bonds to be made at optimal locations with adequate clearance while still achieving short overall interconnection lengths through vertical via routes.
3Adaptability or versatility
If wire routing paths are extended to connect distant bond pads, then all connection requirements are met, but electrical performance degrades and safety risks increase
Solution Approach 1:
The patent uses vertical stacking to create three-dimensional interconnection paths, allowing wires to connect bond pads to ball pads through the thickness of intermediate substrates via via holes. This vertical routing in the Z-dimension significantly reduces wire lengths compared to lateral routing on a single plane, thereby improving electrical performance and reducing safety risks while maintaining connection flexibility.
4Quantity of substance
If multiple substrates are used to stack dice vertically, then interconnection density increases, but device complexity increases
Solution Approach 1:
The intermediate substrates serve multiple functions simultaneously: they provide mechanical support for stacking dies, offer bonding locations for wire connections, contain via holes for vertical interconnections, and enable thermal management. This multi-functionality reduces the need for separate dedicated components, thereby increasing interconnection density while limiting the increase in overall device complexity.
Data Source
AI summary
A stacked die semiconductor package includes: a substrate, having a first surface and an opposite surface thereto; a plurality of dice, structured for being stacked one on top of the other on the first surface of the substrate, including at least a first die which is mounted closest to the first surface, a second die mounted thereupon and having a larger footprint area than the first die, and a top die having a smaller footprint area than the underlying die thereof, and each having a plurality of contact pads and a plurality of wires for electrically connecting the dice to the first surface of the substrate; at least one interposer between the plurality of dice; advantageously, said top die is electrically directly connected to one of the underlying dice. A method for the assembly of a stacked die semiconductor package is provided.