Stacked Ferroelectric Capacitor Structure for DRAM Capacitance Density

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Solution Overview

Problem

As integrated circuit devices undergo miniaturization, the area of the unit cell decreases, posing a challenge in maintaining necessary capacitance while adhering to spatial and design rule limitations for capacitors in dynamic random-access memory (DRAM) and other integrated circuit devices.

Innovation Solution

The integration of a capacitor structure with alternately stacked anti-ferroelectric and ferroelectric dielectric layers, where the ferroelectric layers gradually change their composition in the stack direction, allowing for enhanced capacitance by adjusting polarization characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the area of the unit cell is decreased to increase integration density, then the degree of integration is improved, but the capacitance maintenance becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidcapacitance maintenance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent employs a composite dielectric layer structure consisting of multiple alternating layers with different dielectric constants. Specifically, it uses a first dielectric layer with a first dielectric constant and a second dielectric layer with a second dielectric constant, creating a composite structure that achieves high capacitance in a reduced area. This composite approach allows the capacitor to maintain necessary capacitance values even as the unit cell area decreases, thereby resolving the contradiction between integration density and capacitance maintenance.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent transitions from a conventional single-layer dielectric structure to a multi-layer stacked dielectric structure. By stacking multiple dielectric layers vertically, the effective capacitance is increased in the vertical dimension while the horizontal footprint remains small. This dimensional approach enables the capacitor to achieve high capacitance density, allowing integration density to increase while capacitance maintenance is preserved through the stacked architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a single-layer dielectric structure is used, then the device complexity is low, but the capacitance density is insufficient

Engineering Contradiction:
Improvecapacitance densityVSAvoiddielectric layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses composite dielectric materials with different dielectric constants arranged in alternating layers. The first dielectric layer has a first dielectric constant and the second dielectric layer has a second dielectric constant, creating a composite structure that achieves high capacitance density. This composite material approach allows the capacitor to achieve sufficient capacitance density while managing the complexity through systematic layering rather than random complexity.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent divides the dielectric structure into multiple segmented layers instead of using a single homogeneous layer. Each layer is segmented by material composition and dielectric constant, with alternating first and second dielectric layers. This segmentation allows each layer to contribute to the overall capacitance in a controlled manner, achieving high capacitance density while the segmented structure provides systematic organization that manages device complexity.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If the capacitor area is reduced to meet design rules, then the spatial limitation is overcome, but the desired capacitance becomes difficult to maintain

Engineering Contradiction:
Improvecapacitor areaVSAvoiddesired capacitance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent addresses the area reduction challenge by moving the capacitance enhancement strategy to the vertical dimension. Instead of increasing horizontal area, the patent stacks multiple dielectric layers vertically, each with optimized dielectric constants. This vertical stacking allows the capacitor to achieve desired capacitance values while maintaining a small footprint that complies with design rules, effectively resolving the contradiction between capacitor area reduction and capacitance maintenance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs composite dielectric materials with different dielectric constants in alternating layers to maximize capacitance within the reduced area. By selecting materials with high dielectric constants and arranging them in a composite multi-layer structure, the patent achieves high capacitance density in a compact form factor, allowing the capacitor to meet both the area constraints of design rules and the capacitance requirements for reliable operation.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach efficiently secures desired capacitance by leveraging the material's ability to change polarization direction within the ferroelectric layer, facilitating easier polarization adjustment and potentially larger capacitance while maintaining desired electrical characteristics.

Implementation Method 1

Each of plurality of second dielectric layers may include Hf1-xZrxO2 (where 0 < x ≤ 1) and the plurality of second dielectric layers may gradually change in composition in a stack direction. The material's ability to change polarization direction within the ferroelectric layer allows for enhanced capacitance by adjusting polarization characteristics.

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

The capacitor structure may include a first electrode, a dielectric layer structure on the first electrode, and a second electrode on the dielectric layer structure. The dielectric layer structure includes a plurality of first dielectric layers and a plurality of second dielectric layers which are alternately stacked.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20240072106A1Integrated circuit device
Publication Date: 2024.02.29 SAMSUNG ELECTRONICS CO LTD
  • US20240072106A1 patent drawing
  • US20240072106A1 patent drawing
  • US20240072106A1 patent drawing

AI summary

An integrated circuit device may include a transistor on a substrate, and a capacitor structure electrically connected to the transistor. The capacitor structure may include a first electrode, a dielectric layer structure on the first electrode, and a second electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of first dielectric layers and a plurality of second dielectric layers which are alternately stacked. Each of the plurality of first dielectric layers may include an anti-ferroelectric material, and each of the plurality of second dielectric layers includes Hf1-xZrxO2 in which 0&lt;x&lt;0.5, as a ferroelectric material. An x value may gradually change in a stack direction inside each of plurality of second dielectric layers.