Stacked Figure-8 Inductors for Compact Low-Coupling Packages
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Solution Overview
Problem
There is a need for integrated devices and packages with smaller form factors while maintaining or improving performance, as existing inductors occupy significant space, limiting the miniaturization of integrated devices and packages.
Innovation Solution
The integration of a stacked inductor design featuring figure 8-shaped inductors on multiple metal layers, which provides high inductance with minimal footprint by interleaving spirals and optimizing current paths to reduce mutual inductance and enhance the quality factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional inductor designs are used, then inductance values can be achieved, but the lateral area occupied is large
Solution Approach 1:
The patent transitions from planar inductor designs to three-dimensional stacked inductor designs. Multiple inductor structures are stacked vertically across different metal layers (e.g., first inductor on metal layer 1, second inductor on metal layer 2), enabling the system to achieve high inductance values while occupying minimal lateral area. This vertical stacking approach effectively moves the solution into the third dimension.
Solution Approach 2:
The patent implements nested inductor structures where inductors are positioned within or around each other in the vertical stacking arrangement. For example, a first inductor structure may be nested with a second inductor structure on an adjacent metal layer, with interdigitated fingers extending between them. This nesting enables space-efficient packaging while maintaining electrical isolation and functional performance.
2Area of moving object
If inductors are stacked vertically, then lateral area is reduced, but mutual inductance between inductors increases
Solution Approach 1:
The patent employs asymmetric inductor designs where the first and second inductors have different geometries, orientations, or configurations. This asymmetry disrupts the magnetic coupling between stacked inductors, reducing mutual inductance effects. For example, one inductor may have a spiral pattern while another has an interdigitated pattern, or they may be oriented at different angles relative to each other.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the stacked inductor system. Specific areas may feature shielding structures, magnetic materials, or varied trace patterns tailored to minimize mutual inductance in critical regions while maintaining overall compactness. This localized optimization allows the design to address mutual inductance issues without sacrificing the space-saving benefits of vertical stacking.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design allows for a smaller lateral area in packages while maintaining high inductance values, enabling more compact integrated devices without compromising performance.
Implementation Method 1
a stacked inductor that includes a first figure 8-shaped inductor and a second figure 8-shaped inductor
Data Source
AI summary
An integrated device comprising a die substrate, a die interconnection portion coupled to the die substrate, and a stacked inductor that includes a first figure 8-shaped inductor and a second figure 8-shaped inductor. The stacked inductor may include a first spiral comprising a first origin and a first tail, a second spiral comprising a second origin and a second tail, a third spiral comprising a third origin and a third tail and a fourth spiral comprising a fourth origin and a fourth tail. The first spiral, the second spiral, the third spiral and the fourth spiral may form the first figure 8-shaped inductor and the second figure 8-shaped inductor. The stacked inductor may be located in the die interconnection.