Stacked GAA Epi Contacts Using Frontside and Backside Access

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge of providing effective electrical contacts to stacked transistor devices, particularly in gate-all-around (GAA) semiconductor devices, is exacerbated by the small contact area between the top and bottom source or drain regions, leading to increased contact resistance and fabrication difficulties.

Innovation Solution

A combined frontside and backside contact formation technique is employed, where a frontside contact is formed through the top source or drain region and a backside contact is formed beneath, exposing a portion of the frontside contact to create a single, high-area contact that extends through both regions, maintaining a high contact area and reducing resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If contacts are formed only from the frontside through stacked source or drain regions, then fabrication process is simpler, but contact area is insufficient leading to high contact resistance

Engineering Contradiction:
Improvecontact resistanceVSAvoidcontact formation process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact formation process is segmented into frontside contact formation and backside contact formation. The frontside contact is formed through the top source or drain region, and the backside contact is formed through the bottom source or drain region. These two contacts work together to provide sufficient total contact area while maintaining a relatively simple fabrication process for each individual contact.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact formation is extended from a single-dimensional frontside approach to a three-dimensional approach by adding backside contact formation. This allows contacts to be established from both the top and bottom surfaces of the stacked source or drain regions, effectively doubling the available contact area and reducing contact resistance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If device density is increased by stacking transistor devices vertically, then device density improves, but contact formation to stacked structures becomes difficult

Engineering Contradiction:
Improvedevice densityVSAvoidcontact fabrication
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The contact fabrication process is divided into separate frontside and backside operations. This segmentation allows each contact to be formed independently through relatively simple processes, avoiding the need for complex deep-trench etching and filling operations that would be required to form single contacts through the entire stacked structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By utilizing both the frontside and backside surfaces of the stacked transistor devices, the contact formation process gains an additional spatial dimension. This approach allows contacts to be formed from both the top and bottom surfaces, making contact fabrication to vertically stacked structures as easy as forming contacts to planar structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of moving object

If contact area between top and bottom source or drain regions is reduced to scale devices, then device area decreases, but contact resistance increases

Engineering Contradiction:
Improvedevice areaVSAvoidcontact resistance
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The total contact area is increased by utilizing both the frontside and backside surfaces of the device. This three-dimensional contact approach allows sufficient contact area to be achieved without increasing the planar footprint of the device, enabling area scaling while maintaining low contact resistance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12581717B2Frontside and backside epi contact
Publication Date: 2026.03.17 INTEL CORP
  • US12581717B2 patent drawing
  • US12581717B2 patent drawing
  • US12581717B2 patent drawing

AI summary

Techniques are provided herein to form semiconductor devices having a frontside and backside contact in an epi region of a stacked transistor configuration. In one example, an n-channel device and a p-channel device may both be GAA transistors where the n-channel device is located vertically above the p-channel device (or vice versa). Source or drain regions are adjacent to both ends of the n-channel device and the p-channel device. Deep and narrow contacts may be formed from both the frontside and the backside of the integrated circuit through the stacked source or drain regions. The contacts may physically contact each other to form a combined contact that extends through an entirety of the stacked source or drain regions. The higher contact area provided to both source or drain regions provides a more robust ohmic contact with a lower contact resistance compared to previous contact architectures.