Stacked Gate Oxide Thickness for Dopant Control
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in forming both polysilicon and composite gates in a single integrated die due to limitations in controlling dopant penetration and mask restrictions, leading to potential semiconductor device failure.
Innovation Solution
A method involving the formation of gate oxides with different thicknesses on a semiconductor substrate using a stacked gate structure, where one region has a thicker oxide layer and the other a thinner one, allowing for the use of a single mask to pattern both types of gates, thereby reducing the number of masks and improving dopant control during ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single mask is used to pattern both polysilicon and composite gates, then the number of masks is reduced and manufacturing cost decreases, but dopant penetration control becomes difficult leading to potential device failure
Solution Approach 1:
The patent applies local quality by forming gate oxides with different thicknesses in different regions of the semiconductor substrate. Specifically, a first gate oxide layer is formed in a first region and a second gate oxide layer with different thickness is formed in a second region. This allows each region to have optimized oxide thickness for its specific gate type (polysilicon or composite), enabling precise dopant penetration control in each local area while using a single mask for patterning both gate types.
2Reliability
If gate oxides of different thicknesses are formed in different regions, then dopant penetration control is improved and device reliability increases, but the manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-forming gate oxides of different thicknesses in different regions before the ion implantation step. This preliminary differentiation of oxide thickness allows subsequent single-mask patterning and ion implantation to proceed uniformly across the entire substrate, achieving precise dopant penetration control without requiring complex multi-mask alignment processes or region-specific implantation steps.
Solution Approach 2:
The patent applies universality by using a single mask layer that serves multiple functions: it patterns both polysilicon gates and composite gates simultaneously, and it defines both first and second regions that will receive different oxide thicknesses. This multi-functional mask approach reduces the number of separate patterning steps while achieving the complex goal of creating different gate structures with controlled dopant penetration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the successful integration of both polysilicon and composite gates in a single die, enhancing the reliability and yield of semiconductor devices by reducing dopant penetration issues and minimizing manufacturing costs.
Implementation Method 1
forming a plurality of oxide layers on a semiconductor substrate
Implementation Method 2
implanting ion using the hard mask to form a plurality of doped regions
Data Source
AI summary
A method of making a semiconductor structure can include: (i) forming a plurality of oxide layers on a semiconductor substrate; (ii) forming a plurality of conductor layers on the plurality of oxide layers; (iii) forming plurality of thickening layers on the plurality of conductor layers; (iv) patterning the plurality of conductor layers and the plurality of thickening layers to form a hard mask; and (v) implanting ion using the hard mask to form a plurality of doped regions.