Stacked IC Leadframe Package System for High Density

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Solution Overview

Problem

There is a need for an integrated circuit package system that increases density without sacrificing reliability and yield, as existing methods like lithographic scaling are limited by physical and cost constraints, and stacking multiple semiconductor devices presents challenges in manufacturing.

Innovation Solution

A stacked integrated circuit leadframe package system is developed, where a leadframe is used to package top and bottom integrated circuits with external electrical interconnects, allowing for compact stacking and efficient electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If lithographic scaling is used to increase density, then chip density increases, but manufacturing cost increases and physical limits are reached

Engineering Contradiction:

Improvechip densityVSAvoidmanufacturing cost

Core Design Contradiction:

Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent transitions from planar (2D) integration to three-dimensional (3D) stacking, allowing multiple integrated circuits to be vertically integrated on a single leadframe. This dimensional change enables increased density without requiring further lithographic scaling, thereby avoiding the associated cost increases and physical limitations.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple semiconductor devices are stacked to increase density, then device density increases, but manufacturing complexity increases

Engineering Contradiction:

Improvedevice densityVSAvoidmanufacturing complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent combines multiple integrated circuits and their interconnect structures into a single stacked assembly on one leadframe. This merging approach simplifies manufacturing by treating the multi-device assembly as a unified structure, reducing the number of separate packaging and interconnection steps required compared to traditional discrete mounting methods.

Inventive Principle:

Principle #5Merging (Combining)

3Volume of moving object

If integrated circuits are stacked to reduce size, then package size decreases, but electrical interconnect complexity increases

Engineering Contradiction:

Improvepackage sizeVSAvoidelectrical interconnect complexity

Core Design Contradiction:

Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent implements a nested structure where multiple integrated circuits are stacked vertically within a compact leadframe package. Each circuit layer is interconnected through vertical vias and conductive paths that pass through intermediate layers, creating a nested interconnection architecture that achieves high density while managing electrical complexity through systematic layer-to-layer connections.

Inventive Principle:

Principle #7Nested doll (Nesting)

Data Source

PatentUS7446396B2Stacked integrated circuit leadframe package system

Publication Date: 2008.11.04 STATS CHIPPAC MANAGEMENT PTE LTD

AI summary

A stacked integrated circuit leadframe package system including forming a leadframe, packaging a top integrated circuit on a one side of the leadframe, packaging a bottom integrated circuit on an opposite side of the leadframe, and forming external electrical interconnects on the leadframe.