Stacked Solid-State Image Sensor for Near-Infrared Sensitivity
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Solution Overview
Problem
Conventional solid-state imaging devices using indirect transition semiconductors like Si or Ge have low sensitivity in the near infrared region, and increasing the light receiving area or semiconductor layer thickness requires costly equipment investments and complex processes, with challenges in forming wiring through interlayer connectors and precise bonding of sensor layers.
Innovation Solution
A solid-state imaging device is designed with a laminated structure of first and second semiconductor layers, each containing photoelectric conversion units and floating diffusions, with a wiring layer electrically connected to these diffusions, allowing for improved sensitivity in the near infrared region without the need for deep impurity implantation or multiple epitaxial growths, and incorporating an isoelectronic trap to enhance photoelectric conversion efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor layer thickness is increased to improve near-infrared sensitivity, then the sensitivity is improved, but new equipment investment for implanting impurities deeply or performing epitaxial growth a plurality of times is required, and the manufacturing cost increases
Solution Approach 1:
The patent transitions from increasing thickness in one dimension to using a laminated structure with multiple layers in multiple dimensions. The first semiconductor layer (visible light sensitive) and second semiconductor layer (near-infrared sensitive) are stacked to achieve enhanced near-infrared sensitivity without requiring excessive thickness in a single layer, thereby avoiding the need for deep impurity implantation equipment or multiple epitaxial growth processes.
Solution Approach 2:
The patent employs a composite semiconductor structure where a first semiconductor layer (e.g., silicon for visible light) and a second semiconductor layer (e.g., silicon-germanium alloy for near-infrared) are laminated together. This composite structure enables the device to respond to both visible and near-infrared wavelengths simultaneously, improving near-infrared sensitivity without requiring extreme thickness increases that would demand expensive manufacturing equipment.
2Reliability
If the light receiving area of a pixel is increased to improve sensitivity, then the sensitivity is improved, but the device complexity increases due to challenges in forming wiring through interlayer connectors
Solution Approach 1:
The patent divides the pixel structure into multiple semiconductor layers, each optimized for specific wavelength ranges. The first semiconductor layer handles visible light detection while the second semiconductor layer handles near-infrared detection. This segmentation allows each layer to be optimized independently, reducing the overall complexity of wiring formation compared to a single thick layer approach.
Solution Approach 2:
The patent resolves wiring complexity by transitioning from a planar expansion approach to a vertical stacking approach. Instead of increasing the light receiving area in the horizontal plane (which complicates interlayer connector wiring), the patent stacks semiconductor layers vertically, allowing wiring to be formed on the lateral surfaces or through simplified vertical interconnects, thereby reducing overall device complexity.
3Ease of manufacture
If sensor layers are bonded with each other after the photodiodes are formed, then the structure is completed, but the accuracy of bonding for adjusting the positions of the photodiodes of each sensor layers with respect to each other is required
Solution Approach 1:
The patent applies preliminary action by forming alignment marks and positioning structures on the first semiconductor layer before bonding the second semiconductor layer. This pre-positioning ensures that photodiodes in the second layer align correctly with corresponding structures in the first layer, reducing the required bonding position accuracy and simplifying the overall manufacturing process.
Solution Approach 2:
The patent introduces an intermediary bonding layer or alignment structure between the first and second semiconductor layers. This intermediary element facilitates precise positioning and alignment during the bonding process, reducing the direct precision requirements between the photodiodes of each sensor layer while ensuring proper alignment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies the process of improving near-infrared sensitivity, reduces manufacturing costs, and enhances photoelectric conversion efficiency, particularly in the near infrared region, while minimizing the complexity of bonding and wiring formation.
Implementation Method 1
a first photoelectric conversion unit and a first floating diffusion are formed in a first semiconductor layer; a second photoelectric conversion unit and a second floating diffusion are formed in a second semiconductor layer
Implementation Method 2
An isoelectronic trap may be formed in the second photoelectric conversion unit
Implementation Method 3
the first semiconductor layer and the second semiconductor layer are laminated with each other
Data Source
AI summary
Provided are a solid-state imaging device, a manufacturing method thereof, and an electronic device. The solid-state imaging device includes a first semiconductor layer in which a first photoelectric conversion unit and a first floating diffusion are formed, a second semiconductor layer in which a second photoelectric conversion unit and a second floating diffusion are formed, and a wiring layer including a wiring electrically connected to the first and second floating diffusions. The first semiconductor layer and the second semiconductor layer are laminated, and the wiring layer is formed on a side of the first or second semiconductor layer, the side being opposite to a side on which the first semiconductor layer and the second semiconductor layer face each other.