Stacked LED Sub-Pixel Layout for Higher Pixel Density
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Solution Overview
Problem
The existing light emitting diode (LED) displays face challenges in reducing the mounting process time and increasing the area of each sub-pixel in a restricted pixel area, leading to difficulties in LED chip size reduction and luminous area efficiency.
Innovation Solution
A light emitting device with a stack structure comprising multiple LED stacks and bonding layers, along with planarization layers and buried vias, is used to enhance the area efficiency and mounting process speed, allowing for improved LED chip arrangement and luminous intensity adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple LED chips are arranged on a two-dimensional plane to provide various colors, then color variety is improved, but mounting process complexity and time increase
Solution Approach 1:
The patent transitions from a two-dimensional arrangement of LED chips to a three-dimensional stacked structure. Multiple LED stacks (first, second, and third LED stacks) are arranged vertically, with bonding layers interposed between them. This vertical stacking enables multiple colors to be achieved within a smaller footprint while reducing the number of separate mounting operations required.
2Quantity of substance
If LED chip area is reduced to fit more sub-pixels in a restricted pixel area, then pixel density is improved, but mounting difficulty and luminous area reduction occur
Solution Approach 1:
By stacking LED chips vertically in multiple layers (first LED stack, second LED stack, third LED stack), the patent achieves higher pixel density without reducing individual LED chip area. The bonding layers and planarization layers enable this vertical integration while maintaining manufacturability through standardized bonding processes.
Solution Approach 2:
The patent implements a nested structure where multiple LED stacks are integrated within a single pixel area through vertical stacking. The first, second, and third LED stacks are positioned at different heights, with bonding layers and planarization layers filling the spaces between them, creating a compact nested arrangement that increases pixel density without compromising chip size.
3Adaptability or versatility
If multiple LED chips are arranged on a two-dimensional plane to provide various colors, then color variety is improved, but manufacturing cost and time increase
Solution Approach 1:
The vertical stacking architecture allows multiple color-emitting LED stacks to be integrated within a single pixel location. The bonding layers (first bonding layer, second bonding layer) and planarization layers enable simultaneous integration of multiple stacks, reducing the sequential mounting time required for separate two-dimensional chip placements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the area of each sub-pixel, reduces the time required for the mounting process, and enhances the process yield by enabling more efficient LED chip arrangement and luminous intensity control.
Implementation Method 1
a first bonding layer interposed between the second LED stack and the third LED stack, and a second bonding layer interposed between the first LED stack and the second LED stack
Implementation Method 2
lower buried vias passing through the first planarization layer, the second LED stack, and the first bonding layer, and electrically connected to a first conductivity type semiconductor layer and a second conductivity type semiconductor layer of the third LED stack
Implementation Method 3
Light emitting device for a display... a first LED stack, a second LED stack located under the first LED stack, and a third LED stack located under the second LED stack
Data Source
AI summary
A light emitting device for a display according to an exemplary embodiment includes a first LED stack, a second LED stack located under the first LED stack, and a third LED stack located under the second LED stack. The light emitting device further includes a first bonding layer, a second bonding layer, a first planarization layer, a second planarization layer, lower buried vias, and upper buried vias. The first planarization layer is recessed inwardly to expose an edge of the second LED stack.