Stacked Semiconductor Memory Device Segmentation
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Solution Overview
Problem
The challenge in semiconductor memory devices is to achieve higher integration and capacity beyond the limits of miniaturization, particularly in stacked-type NAND flash memory devices, where efficient interconnection and semiconductor member arrangements are needed to enhance storage density and performance.
Innovation Solution
The solution involves a stacked-type semiconductor memory device design with alternating insulating and electrode films, segmented by insulating plates and members, which creates isolated parts and connections between electrode films, allowing for increased integration by dividing and connecting electrode films and insulating members in specific patterns to form memory cell transistors and improve manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If circuits are miniaturized to increase capacity, then storage density improves, but manufacturing precision and reliability deteriorate as miniaturization approaches its limit
Solution Approach 1:
The patent transitions from planar 2D circuit arrangement to a 3D stacked configuration where semiconductor members extend vertically in the third direction. Multiple interconnection lines are stacked at different heights, forming memory cells at cross-points between horizontal interconnections and vertical semiconductor members, thereby achieving higher integration density without further miniaturizing individual circuits
Solution Approach 2:
The patent divides the interconnection structure into multiple segments using insulating plates that intermittently dispose along the first direction. These insulating plates segment the continuous interconnection lines into isolated parts, enabling independent control and formation of multiple memory cell regions while maintaining the stacked 3D architecture
2Quantity of substance
If stacked-type structure is adopted to increase capacity beyond miniaturization limits, then storage density improves, but device complexity increases due to multiple interconnections and semiconductor members
Solution Approach 1:
The insulating plates serve multiple functions simultaneously: they electrically isolate adjacent interconnection lines, provide structural support for the stacked configuration, and define the spatial arrangement of memory cell regions. This multi-functionality reduces the need for additional specialized components, simplifying the overall device structure despite the 3D stacked architecture
Data Source
AI summary
A semiconductor memory device includes a first electrode film and a second electrode film spreading along a first direction and a second direction, first insulating plates intermittently disposed along the first direction and each of two columns separated in the second direction from each other, second insulating plates provided between the two columns, intermittently disposed along the first direction and each of n columns, third insulating plates provided between one of the two columns and a column formed of the second insulating plates, intermittently disposed along the first direction, a first insulating member provided between the first insulating plate and the third insulating plate, and a second insulating member provided between the second insulating plate and the third insulating plate. The first electrode film is divided into two parts between the two columns. The second electrode film is divided into {(n+1)×2} parts between the two columns.