Stacked Memory Cell Air-Gap Layer for MTJ Processing Space

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Solution Overview

Problem

In memory devices with stacked memory cells, adjacent cells in the X or Y direction often cannot be sufficiently separated due to reduced intervals, leading to potential short circuits and processing difficulties, especially when forming tapered structures like MTJ elements.

Innovation Solution

Incorporating intermediate layers with a higher etching rate than other components between memory elements and switching elements, which are porous and include air gaps, to create larger spaces and prevent short circuits while maintaining cell separation without increasing pitch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a variable resistance element is used as a memory element, then the memory device can achieve non-volatile storage and fast write speed, but the data retention and switching efficiency characteristics are insufficient

Engineering Contradiction:
Improvedata retentionVSAvoidswitching efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

An intermediate layer is introduced between the memory element and the switching element. This intermediate layer serves as a mediator that improves the interface characteristics, leading to enhanced data retention and switching efficiency without changing the fundamental memory element structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The intermediate layer is formed by composite materials containing specific elements (boron, carbon, silicon, magnesium, aluminum, scandium, titanium, vanadium, gallium, germanium, yttrium, zirconium, niobium, molybdenum, palladium, silver, hafnium, tantalum, tungsten, iridium, or platinum) that provide both reliable data retention and efficient switching characteristics

Inventive Principle:
Principle #40Composite materials

2Reliability

If the memory device structure is simplified, then the manufacturing process becomes easier, but the data retention and switching efficiency cannot be improved

Engineering Contradiction:
Improvedata retentionVSAvoidmemory device structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device is segmented into distinct functional layers: a memory element layer, an intermediate layer, and a switching element layer. This segmentation allows each layer to be optimized independently for its specific function while maintaining overall device performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate layer is positioned specifically at the interface between the memory element and switching element where quality improvement is most needed. This localized approach enhances data retention and switching efficiency without requiring changes to the entire device structure

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach secures processing spaces for switching elements, reduces defects, improves MTJ element characteristics, and enhances thermal stability and reliability by increasing distances between memory elements and switching elements.

Implementation Method 1

A memory device using a variable resistance element (for example, a magnetoresistive effect element) as a memory element is known.

Methodology Applied
Scientific EffectMagnetoresistive effect: Magnetoresistance

Data Source

PatentUS20230284537A1Memory device and method for manufacturing memory device
Publication Date: 2023.09.07 KIOXIA CORP
  • US20230284537A1 patent drawing
  • US20230284537A1 patent drawing
  • US20230284537A1 patent drawing

AI summary

According to one embodiment, a memory device includes a memory element provided above a substrate in a first direction perpendicular to a first surface of the substrate; a switching element provided between the substrate and the memory element; and a first layer provided between the memory element and the switching element. The first layer includes at least one selected from the group including boron, carbon, silicon, magnesium, aluminum, scandium, titanium, vanadium, gallium, germanium, yttrium, zirconium, niobium, molybdenum, palladium, silver, hafnium, tantalum, tungsten, iridium, and platinum. The first layer includes an air gap.