Stacked Memory Spare Cell Pool for Post-Bond Repair

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Solution Overview

Problem

In three-dimensional memory devices, the existing repair methods are inefficient, leading to high waste rates since a single layer failure requires discarding the entire memory, and existing spare cell systems are inadequate for post-bond repair processes.

Innovation Solution

A stacked memory device with a system layer comprising a solution memory and a spare memory, controlled by a memory controller, which stores and manages solution information to logically replace faulty cells across memory layers, allowing for efficient post-bond test and repair processes without the need for additional testing, even when power is blocked.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a spare cell is provided in each layer for repair, then the repair capability is improved, but the device complexity and time consumption increase due to the need to approach and test each memory layer individually

Engineering Contradiction:
Improverepair capabilityVSAvoidtime wasted during approach to memory layer
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the spare cells from multiple memory layers into a unified spare cell pool located in the system layer. Instead of individually approaching and testing spare cells in each memory layer, the system layer consolidates all spare cells into a single accessible location, allowing simultaneous management and testing of all spare cells across the stacked memory device.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system layer acts as an intermediary between the memory layers and the repair process. It contains the unified spare cell pool and manages the repair operations, eliminating the need to directly approach each memory layer individually. The system layer mediates the repair process by providing centralized access to all spare cells through a single interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If spare cells are disposed in the base die for post-bond test and repair, then the repair rate is improved, but additional testing is required even when power is blocked

Engineering Contradiction:
Improverepair rateVSAvoidtime for additional testing
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-configuring the unified spare cell pool in the system layer with all necessary repair information and mappings before the memory device enters operation or power-off states. The spare cells are pre-associated with their corresponding memory layer locations, so that when a failure occurs, the repair process can immediately utilize the pre-prepared spare cell information without requiring additional testing even when power is blocked.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical approach of physically testing each spare cell through electrical connections with a data-based system. The system layer stores mapping information that directly associates faulty cell locations with available spare cells, allowing the memory controller to perform logical substitutions without physical testing. This substitution of mechanical testing with information-based management eliminates the need for additional testing when power is blocked.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If spare cells are shared across memory layers, then the repair flexibility is improved, but the difficulty of determining which spare cell to use increases

Engineering Contradiction:
Improverepair flexibilityVSAvoiddifficulty of selecting meaningful data
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements a feedback mechanism where the system layer maintains a mapping database that tracks the status of all spare cells and their associations with memory layers. When a failure is detected in a memory layer, the memory controller queries the system layer for available spare cells, and the system layer provides feedback with specific recommendations based on the mapping information. This feedback loop eliminates the difficulty of selecting meaningful data by providing direct, informed guidance on which spare cell to use.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system layer serves multiple functions: it acts as a controller for memory operations, maintains the spare cell pool, stores mapping information, and provides repair management. This multi-functionality allows the system layer to universally manage all spare cells across all memory layers, providing a single point of control that simplifies the selection process. The universal interface in the system layer handles all spare cell allocations regardless of which memory layer is affected.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10395755B2Stacked memory device using base die spare cell and method of repairing the same
Publication Date: 2019.08.27 IND ACADEMIC COOP FOUND YONSEI UNIV
  • US10395755B2 patent drawing
  • US10395755B2 patent drawing
  • US10395755B2 patent drawing

AI summary

Disclosed are a stacked memory device and a method of repairing the same, in which spare cells for a post-bond test and repair process are disposed in a base die and the spare cells are used in each memory layer as many as the number desired, a repair result after the test is permanently stored, and the spare cell of the base die and the memory layer are simultaneously approached and meaningful data is selected, so that it is not necessary to newly perform a test even though power of a memory is blocked, it is possible to solve time wasted during an approach to a memory layer after a spare memory performs determination, and it is possible to secure a high repair rate.