Stacked Memory Device Storage Component Integration
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Solution Overview
Problem
Existing memory devices face challenges in increasing storage capacity at lower hierarchical levels due to cost, spatial, and thermal constraints, while also dealing with bandwidth bottlenecks between storage and memory components.
Innovation Solution
A stacked memory device with volatile memory dies and a storage component that includes a storage controller die and non-volatile storage dies, allowing for increased capacity with minimal size and cost increments, while communicating at the same bandwidth as the memory dies to reduce bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If storage capacity at lower hierarchical levels is increased, then data access speed and computing performance are improved, but cost and spatial requirements increase
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacked architecture, placing storage component and memory component on different vertical layers. This dimensional change enables significantly increased storage capacity within the same footprint area, resolving the contradiction between storage capacity and spatial requirements.
Solution Approach 2:
The storage component is integrated within the memory device package, with storage dies stacked beneath memory dies. This nested configuration allows the storage component to occupy unused vertical space within the existing device envelope, increasing capacity without proportionally increasing external dimensions.
2Speed
If storage capacity at lower hierarchical levels is increased, then data access speed and computing performance are improved, but manufacturing cost increases
Solution Approach 1:
By moving to 3D stacking architecture, the patent achieves higher storage capacity per unit cost. The vertical integration reduces the need for expensive high-speed interconnects across long horizontal distances, while standardizing the stacking process enables economies of scale in manufacturing.
Solution Approach 2:
The patent combines storage component and memory component into a single integrated device package, sharing common control logic, power management, and packaging infrastructure. This merging eliminates the need for separate external storage devices and their associated interconnect costs, reducing overall system manufacturing cost while improving performance.
3Speed
If bandwidth between storage and memory components is increased, then data transfer speed is improved, but device complexity increases
Solution Approach 1:
The short vertical distance between storage and memory layers enables high-bandwidth data transfer through direct adjacent-layer communication. This spatial proximity eliminates the need for complex high-speed serial protocols and extensive signal conditioning circuitry that would be required for long-distance horizontal connections, achieving high bandwidth with reduced complexity.
Data Source
AI summary
A stacked memory device (e.g., a high-bandwidth memory (HBM) device) having a storage component is disclosed. The stacked memory device can include a first logic die, one or more memory dies, a second logic die, and one or more storage dies. The first logic die is coupled with the one or more memory dies and the second logic die through TSVs. The second logic die is coupled with the one or more storage dies through additional TSVs. The first logic die can issue commands to the one or more memory dies that cause the one or more memory dies to perform operations (e.g., read/write operations). The first logic die can also issue commands to the second logic die that cause the second logic die to issue commands to the one or more storage dies to perform operations.