Stacked Memory Timing Adjustment Using Chip-Count Trimming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing memory systems with stacked memory chips face challenges in dynamically adjusting the setup hold time due to differences in input capacitance between clock and data signal pins, leading to limitations in chip manufacture and inventory management.
Innovation Solution
A memory system with a look-up table storage device and control logic circuit that adjusts the setup hold time based on the number of chip connections, using trimming shift values stored in advance to fine-tune the timing between clock and data signals without the need for fuses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If laser fuse is used to store setup hold time, then the setup hold time can be stored before chip separation, but it cannot be adjusted arbitrarily after chip separation
Solution Approach 1:
The patent implements a dynamic adjustment mechanism for setup hold time by introducing a control logic circuit that can modify the setup hold time based on the number of stacked memory chips. The control logic circuit receives the stack number from the chip number identification circuit and dynamically selects appropriate trimming shift values from the look-up table storage device, enabling the system to adapt to different stacking configurations without being fixed during manufacturing.
Solution Approach 2:
The patent changes the parameter of setup hold time based on the number of stacked chips. The look-up table storage device stores multiple trimming shift values corresponding to different stack numbers (1-8 chips), and the control logic circuit selects the appropriate trimming shift value based on the detected stack number, thereby adjusting the setup hold time parameter to match the specific configuration.
2Adaptability or versatility
If electronic fuse is used to store setup hold time, then the setup hold time can be adjusted, but the area of programming circuit is increased and additional programming procedures are needed
Solution Approach 1:
The patent extracts the trimming shift value selection function from a complex programming circuit and implements it through a simplified look-up table storage device and control logic circuit. Instead of using an electronic fuse that requires extensive programming circuitry and procedures, the invention uses a compact look-up table that directly stores pre-calculated trimming shift values, significantly reducing the programming circuit area and eliminating complex programming steps.
Solution Approach 2:
The patent replaces the expensive and complex electronic fuse programming mechanism with a simpler, more cost-effective look-up table storage device. The look-up table contains pre-stored trimming shift values that can be easily selected without requiring complex programming operations, thereby reducing both the circuit area and manufacturing complexity.
3Quantity of substance
If the number of stacked memory chips is increased, then the memory density is increased, but the input capacitance difference between CK pin and DQ pin becomes larger
Solution Approach 1:
The patent applies local quality adjustment by providing different trimming shift values for different positions in the stack. The look-up table storage device stores specific trimming shift values corresponding to each stack number (1-8 chips), allowing each memory chip in the stack to have locally optimized timing parameters based on its position and the total number of chips, thereby compensating for the varying input capacitance differences at different stack configurations.
Data Source
AI summary
A memory system includes memory chips connected to each other. Each of the memory chips includes a memory array, a read/write data strobe pin, a look-up table storage device, a chip number identification circuit, and a control logic circuit. The memory array stores data. The read/write data strobe pin is connected to read/write data strobe pins of other memory chips. The look-up table storage device stores a plurality of trimming shift values related to a number of chip connections in advance. The chip number identification circuit identifies a current number of chip connections according to a state information, and finds a selected trimming shift value from the look-up table storage device. The control logic circuit transmits a data signal in response to a clock signal, and adjusts a setup hold time between the clock signal and the data signal according to the selected trimming shift value.