Stacked Memory Die Wire-Bond Layout for Higher Package Density

The patent transitions from planar wire-bonding on package boards to three-dimensional stacked memory dice configurations. Multiple memory dice are vertically stacked and interconnected through wire-bonds, moving the connection architecture from a two-dimensional layout to a three-dimensional structure. This dimensional change allows electrical connections to be established while minimizing the footprint on the package board, as multiple devices share the same vertical space rather than requiring lateral expansion.

The patent implements a nested configuration where multiple memory dice are stacked vertically, with each die containing memory cells arranged in tiered strings. The memory cells are organized in horizontal rows and columns with staircase contact structures, creating a nested hierarchy of interconnected components. This nesting allows multiple functional units to be compacted into a smaller volume, reducing the space required on package boards while maintaining comprehensive electrical connectivity.

The patent employs vertical stacking of memory dice to create a three-dimensional architecture, allowing complex interconnections to be achieved through vertical wire-bonds rather than lateral routing. This dimensional transition enables multiple memory devices to be interconnected with processors and other components through a compact vertical arrangement, maintaining high adaptability for external connections while maximizing packaging density by utilizing the vertical dimension instead of horizontal space.

The patent divides the memory system into multiple discrete memory dice, each containing segmented memory cells organized in tiered strings with horizontal rows and columns. This segmentation allows for modular interconnection, where each die can be independently connected to processors and other devices through wire-bonds. The segmented architecture provides versatility in external interconnections while maintaining compact packaging, as each segment can be optimally positioned and connected without requiring extensive lateral space.

The patent implements fan-in assemblies where multiple memory dice are stacked vertically with wire-bonds converging from multiple dies to common connection points on the package board or interposer. This nested stacking configuration achieves high packaging density by utilizing vertical space, and the wire-bonding complexity is managed through the fan-in architecture where bonds from multiple dies are routed to shared connection locations, reducing the total number of unique bond paths compared to individual die connections.

The patent introduces interposers as intermediary components in the fan-in assembly configuration. These interposers serve as mediation layers between the stacked memory dice and the package board or processors, providing a centralized point for wire-bond convergence. The interposer simplifies the wire-bonding complexity by acting as an intermediate hub that consolidates connections from multiple memory dice, making the overall assembly more manageable while maintaining high packaging density through the vertical stack configuration.