Stacked Memristor Read Path for Fine Conductance Gradations
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Solution Overview
Problem
Current memristor devices face challenges in efficiently representing multiple gradations due to limited conductance change ranges and overlapping conductance values, which affects their performance in neuromorphic applications.
Innovation Solution
The design incorporates two variable conductance elements with distinct conductance ranges and sizes, allowing for a merged read path that combines their conductance values to achieve a wide maximum change range and narrow gradation change range, enabling the representation of many gradations within a limited area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single variable conductance element is used, then the device structure is simple, but the conductance change range is narrow leading to limited gradations and reading errors
Solution Approach 1:
The memristor is divided into two separate variable conductance elements (first and second variable conductance elements) with distinct conductance ranges. Each element can be independently controlled to change its conductance, allowing the system to achieve a wider overall conductance change range by combining the ranges of both elements, thus solving the limitation of narrow conductance change in single-element devices.
Solution Approach 2:
The patent introduces a new dimension of conductance control by stacking variable conductance elements in the vertical direction rather than using a single element. This multi-layer structure allows independent conductance modulation of each layer, effectively expanding the total conductance dynamic range and enabling finer gradations without increasing the planar device footprint.
2Manufacturing precision
If multiple variable conductance elements are used to increase conductance change range, then the conductance gradations improve, but the device size increases
Solution Approach 1:
Multiple variable conductance elements are nested in a vertical stack configuration, with each element positioned above the other in the vertical direction. This nesting approach allows multiple functional elements to be integrated within a compact footprint, achieving wide conductance change range and fine gradations without proportionally increasing the device's planar area.
Solution Approach 2:
The solution transitions from a single-plane configuration to a multi-layer vertical stack, utilizing the vertical dimension to accommodate multiple variable conductance elements. This dimensional transition enables the device to achieve enhanced conductance control capabilities while maintaining a compact overall device size.
3Manufacturing precision
If separate read paths are used for each variable conductance element, then the conductance control is precise, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the read paths of multiple variable conductance elements into a single shared read path. During read operations, the elements are connected in series, allowing their conductances to be read simultaneously through the same current path. This merging approach reduces the number of separate read circuits needed while maintaining the ability to precisely control and read each element's conductance state.
Solution Approach 2:
The shared read path serves multiple variable conductance elements simultaneously, making it a universal read interface for the entire stack. This multi-functional read path design simplifies the overall device architecture by eliminating the need for dedicated read circuits for each element, thereby reducing manufacturing complexity while preserving precise conductance control capabilities.
Data Source
AI summary
A memristor includes a first variable conductance element and a second variable conductance element. A minimum value of conductance of the second variable conductance element during reading is larger than a maximum value of conductance of the first variable conductance element during reading. In the memristor, a first read path when the conductance of the first variable conductance element is read merges with a second read path when the conductance of the second variable conductance element is read.