Stacked MOSFET Transistor Cells for Long-Channel Node Porting

Solution Overview

Problem

The transition to newer semiconductor process nodes often lacks availability of higher voltage devices and longer channel length transistors, making it difficult to design circuits and port databases effectively, as these devices are not available at the newer nodes, and new transistor models are in flux, complicating die shrinkage and design criteria assessment.

Innovation Solution

The use of transistor cells with uniform or mixed channel lengths organized into multi-stage stacked gate configurations, which can replace higher voltage and longer channel length devices, allowing for easier monitoring and integration into design flows, and can be used to create equivalent devices in macro models for circuit design, facilitating porting from previous process nodes to newer nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If transistors from previous process nodes are used, then higher voltage devices and longer channel devices are available, but die size is larger and transistor density is lower

Engineering Contradiction:

Improveavailability of higher voltage devices and longer channel devicesVSAvoiddie size

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent segments a single long-channel transistor into multiple shorter-channel transistors connected in series. Each segmented transistor has a channel length suitable for the newer process node, while the series connection achieves the equivalent electrical characteristics of a longer channel device, including higher drain-to-source resistance and improved current mismatch performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from a planar single-transistor layout to a multi-dimensional stacked gate configuration. By stacking multiple transistor gates vertically and connecting their channels in series, the design achieves the electrical equivalent of a long-channel device while occupying significantly less die area, effectively utilizing the third dimension to resolve the contradiction.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If transistors from newer process nodes are used, then die size is smaller and transistor density increases, but higher voltage devices and longer channel devices are not available

Engineering Contradiction:

Improvedie sizeVSAvoidavailability of higher voltage devices and longer channel devices

Core Design Contradiction:

Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent segments a single long-channel transistor into multiple shorter-channel transistors connected in series. Each segmented transistor has a channel length suitable for the newer process node, while the series connection achieves the equivalent electrical characteristics of a longer channel device, including higher drain-to-source resistance and improved current mismatch performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the electrical parameters of multiple short-channel transistors by connecting them in series. This configuration transforms the overall drain-to-source resistance and channel length characteristics to match those of a single long-channel device from a previous process node, enabling the newer process node to provide equivalent functionality.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If multiple transistors are used to replace longer channel devices, then equivalent electrical characteristics can be achieved, but parasitic capacitance increases and speed decreases

Engineering Contradiction:

Improvecurrent mismatch performanceVSAvoidtransistor switching speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent merges multiple transistor gates into a stacked gate configuration where the gates are connected in parallel. This merging reduces the total gate capacitance compared to having separate transistors, while the series connection of channels maintains the equivalent long-channel electrical characteristics including improved current mismatch performance.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a planar single-transistor layout to a multi-dimensional stacked gate configuration. By stacking multiple transistor gates vertically and connecting their channels in series, the design achieves the electrical equivalent of a long-channel device while occupying significantly less die area, effectively utilizing the third dimension to resolve the contradiction.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240379757A1Transistor cells for longer channel transistors

Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A device including at least one transistor cell including metal-oxide semiconductor field-effect transistors each having drain/source terminals and a channel length. The at least one transistor cell includes a first number of transistors of the metal-oxide semiconductor field-effect transistors connected in series, with one of the drain/source terminals of one of the first number of transistors connected to one of the drain/source terminals of another one of the first number of transistors and gates of the first number of transistors connected together. The at least one transistor cell configured to be used to provide a transistor having a longer channel length than the channel length of each of the metal-oxide semiconductor field-effect transistors.