Stacked NAND Flash Memory Cell Data Retention Control
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Solution Overview
Problem
Current stacked type NAND flash memories have insufficient data retention characteristics, which affects their performance and reliability.
Innovation Solution
A nonvolatile semiconductor memory device with a memory cell array comprising stacked memory cells, where each cell includes a first semiconductor layer, a charge storage layer, and a conductive layer, and a control circuit that executes a first program operation followed by a second program operation to enhance data retention by preventing electron migration from the charge storage layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a stacked type NAND flash memory is used to improve bit density, then storage capacity increases, but data retention characteristics deteriorate
Solution Approach 1:
The patent applies preliminary action by performing a first program operation before the main data writing process. This preliminary program operation prepares the memory cell state in advance, ensuring that electrons are properly positioned in the charge storage layer before subsequent operations, thereby preventing electron migration and improving data retention in stacked memory cells
Solution Approach 2:
The patent utilizes parameter changes by applying different voltages to the body and gate of the memory cell during the first program operation. By controlling the voltage parameters (applying a voltage to the body and a different voltage to the gate), the patent manages electron distribution and prevents migration, thus improving data retention while maintaining the stacked memory structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses data degradation by ensuring that electrons are retained in the charge storage layer, thereby improving the data retention characteristics of the memory device compared to devices that only perform the first program operation.
Implementation Method 1
each of the memory cells includes a first semiconductor layer extending in a perpendicular direction with respect to the semiconductor substrate, a charge storage layer, and a first conductive layer
Implementation Method 2
The control circuit executes a first program operation. The first program operation is an operation that supplies a first voltage to the body of the memory cell and supplies a second voltage larger than the first voltage to the gate of the memory cell
Data Source
AI summary
A memory cell comprises a first semiconductor layer, and a first conductive layer. The first semiconductor layer extends in a perpendicular direction with respect to a semiconductor substrate. The first conductive layer sandwiches a charge storage layer with the first semiconductor layer. A control circuit executes a first program operation and then executes a second program operation. The first program operation supplies a first voltage to the body of the memory cell and supplies a second voltage larger than the first voltage to the gate of the memory cell. The second program operation renders the body of the memory cell in a floating state and supplies a third voltage which is positive to the gate of the memory cell.