Stacked Oxide Gate Driver for Compact Power Transistor Switching

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Solution Overview

Problem

Existing semiconductor devices for high-power transistors face challenges in achieving low power consumption, high integration, and preventing malfunction while maintaining reliability and avoiding increased manufacturing costs, particularly in driving high-power loads with high-speed switching characteristics across a wide temperature range.

Innovation Solution

A semiconductor device comprising a first and second transistor, a gate driver, and comparator circuits that include transistors with metal oxide channels, specifically indium and zinc, to convert PWM signals into high-voltage signals efficiently, allowing for low power consumption and high integration with reduced manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon transistors are used to convert PWM signals to high-voltage signals, then the power transistor can be driven, but the device size increases and power consumption increases

Engineering Contradiction:
Improvepower transistor driving capabilityVSAvoidsemiconductor device size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the material parameter of the transistor from silicon to oxide semiconductor, which fundamentally alters the electrical characteristics and enables smaller device size with lower power consumption while maintaining the capability to drive power transistors

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a hybrid structure combining oxide semiconductor transistors with other semiconductor materials, creating a composite device that leverages the advantages of different materials to achieve both small size and reliable power transistor driving

Inventive Principle:
Principle #40Composite materials

2Productivity

If more transistors are added to achieve high integration, then the degree of integration increases, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvedegree of integrationVSAvoidcircuit structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple transistor functions into a unified oxide semiconductor transistor structure, reducing the total number of discrete components needed while achieving high integration through the inherent capabilities of the oxide semiconductor material

Inventive Principle:
Principle #5Merging (Combining)

3Use of energy by stationary object

If oxide semiconductor transistors are used, then power consumption decreases and device size reduces, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepower consumptionVSAvoidoxide semiconductor layer formation precision
Core Design Contradiction:
Use of energy by stationary objectVSManufacturing precision

Solution Approach 1:

The patent replaces conventional mechanical/thermal processing methods with plasma-based processing techniques for oxide semiconductor layer formation, achieving the required manufacturing precision through controlled plasma reactions rather than traditional high-temperature processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20230353110A1Semiconductor device, amplifier, and electronic device
Publication Date: 2023.11.02 SEMICON ENERGY LAB CO LTD
  • US20230353110A1 patent drawing
  • US20230353110A1 patent drawing
  • US20230353110A1 patent drawing

AI summary

A small semiconductor device is provided. A semiconductor device with low power consumption is provided. A semiconductor device with a high degree of integration is provided. The semiconductor device includes a first transistor, an insulating layer over the first transistor, a conductive layer, and a gate driver; part of the conductive layer is provided to be embedded in the insulating layer; the gate driver includes a second transistor and a third transistor; the second transistor and the third transistor are stacked and provided over the first transistor; the second transistor and the third transistor each contain a metal oxide in a channel formation region; one of a source and a drain of the second transistor and one of a source and a drain of the third transistor are electrically connected to a gate of the first transistor through the conductive layer; the gate driver is supplied with a first potential and a second potential; and the gate driver has a function of selecting the first potential or the second potential and supplying the selected potential to the gate of the first transistor.