Stacked Semiconductor Package Using Adhesive Die Bonding

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Solution Overview

Problem

Existing semiconductor package structures face challenges in manufacturing cost and complexity as semiconductor dies incorporate more functions, necessitating further improvements.

Innovation Solution

The semiconductor package structures are designed with stacked semiconductor dies connected via an adhesive layer instead of bump structures, allowing for flexible chip design and reduced manufacturing costs through single molding and planarization processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If semiconductor dies are connected using traditional bump structures, then electrical connection is achieved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvemanufacturing costVSAvoidmanufacturing complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent removes the bump structure from the semiconductor package, extracting the complex electrical connection mechanism and replacing it with a simpler adhesive-based stacking approach. This eliminates the need for precise bump alignment and reduces manufacturing steps while maintaining electrical connectivity through the adhesive layer itself

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the fundamental parameter of die connection from mechanical/electrical bumps to chemical adhesive bonding. This parameter shift allows for greater tolerance in alignment and simplifies the manufacturing process by eliminating complex bump formation and alignment steps

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If semiconductor dies include more functions, then device capability increases, but manufacturing cost and difficulty increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent divides the semiconductor system into separate functional dies that can be independently manufactured and then stacked using the simplified adhesive process. This segmentation allows each die to be optimized for its specific function while using the same simple connection methodology, preventing manufacturing complexity from escalating with added functionality

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If semiconductor dies include more functions, then device capability increases, but manufacturing difficulty increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing difficulty
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The adhesive layer serves multiple functions simultaneously: it provides mechanical bonding between dies, enables electrical connection through conductive pathways, and allows for thermal management. This multi-functionality eliminates the need for separate bump structures and simplifies the overall manufacturing process even as device functionality increases

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances manufacturing flexibility and reduces costs while increasing yield, being friendly to Outsourced Semiconductor Assembly and Test Services (OSATs) production.

Implementation Method 1

The adhesive layer extends between the first semiconductor die and the second semiconductor die

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS12588522B2Semiconductor package structure
Publication Date: 2026.03.24 MEDIATEK INC
  • US12588522B2 patent drawing
  • US12588522B2 patent drawing
  • US12588522B2 patent drawing

AI summary

A semiconductor package structure includes a first redistribution layer, a second redistribution layer, a first semiconductor die, a second semiconductor die, an adhesive layer, and a molding material. The second redistribution layer is disposed over the first redistribution layer. The first semiconductor die and the second semiconductor die are stacked vertically between the first redistribution layer and the second redistribution layer. The first semiconductor die is electrically coupled to the first redistribution layer, and the second semiconductor die is electrically coupled to the second redistribution layer. The adhesive layer extends between the first semiconductor die and the second semiconductor die. The molding material surrounds the first semiconductor die, the adhesive layer, and the second semiconductor die.