Stacked Semiconductor Package Without Penetration Electrodes
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Solution Overview
Problem
Existing semiconductor packages face challenges in efficiently stacking multiple semiconductor chips while maintaining a compact size, high functionality, and cost-effectiveness, often requiring complex penetration electrodes that complicate the manufacturing process and reduce reliability.
Innovation Solution
A semiconductor package design that stacks semiconductor chips as modules, using conductive pillars and redistribution substrates for electrical connections, eliminating the need for penetration electrodes, and utilizing solder balls and bonding wires for inter-module connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If penetration electrodes are used to connect stacked semiconductor chips, then electrical connectivity is achieved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the electrical connection system into separate components: conductive pillars on the first chip, redistribution substrates as intermediate connection layers, and bonding wires for final connections. This segmentation eliminates the need for complex penetration electrodes that would require drilling and plating through entire chip stacks, thereby reducing manufacturing complexity while maintaining reliable electrical connectivity.
Solution Approach 2:
The redistribution substrate acts as an intermediary element between the conductive pillars of the first semiconductor chip and the bonding wire connections to the second chip. This intermediate layer simplifies the connection architecture by providing a standardized interface that reduces the complexity of direct penetration electrode implementation.
2Adaptability or versatility
If multiple semiconductor chips are stacked to increase functionality, then multi-functional properties are achieved, but package size increases
Solution Approach 1:
The patent transitions from planar chip arrangement to vertical stacking in the third dimension. Multiple semiconductor chips are arranged stacked one above another, connected through conductive pillars and redistribution substrates. This dimensional change allows increased functionality without proportionally increasing the horizontal package footprint, as the expansion occurs primarily in the vertical direction.
3Reliability
If complex penetration electrodes are used for chip stacking, then electrical connections are established, but manufacturing cost and process difficulty increase
Solution Approach 1:
The patent extracts the connection function from the penetration electrode structure and distributes it across multiple simpler components: conductive pillars formed on chip surfaces, redistribution substrates for signal routing, and bonding wires for inter-chip connections. This extraction eliminates the need for complex penetration electrode fabrication processes involving drilling, plating, and alignment through multiple chips, thereby reducing manufacturing cost and process difficulty.
Solution Approach 2:
The conductive pillars are formed on the first semiconductor chip before the second chip is attached. This preliminary formation of connection structures allows for simpler, more cost-effective manufacturing processes compared to forming penetration electrodes through stacked chips after assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables easy and cost-effective stacking of semiconductor chips, improving reliability and simplifying the rework process, while reducing the package size and maintaining electrical connectivity.
Implementation Method 1
the first semiconductor module comprises solder balls on the fourth surface of the redistribution substrate, the fourth surface of the redistribution substrate faces the substrate of the semiconductor package, the first semiconductor module is electrically connected to the substrate through the solder balls
Implementation Method 2
the bonding wire electrically connects the connection pad of the second semiconductor module to the substrate of the semiconductor package
Implementation Method 3
the plurality of conductive pillars electrically connected to the first surface of the first semiconductor chip and the third surface of the redistribution substrate
Data Source
AI summary
A semiconductor package includes at least one semiconductor module on a substrate. The semiconductor module includes a first semiconductor chip having a first surface and a second surface opposite to the first surface, a second semiconductor chip on the first surface, a plurality of conductive pillars on the first surface, and a redistribution substrate on the second semiconductor chip and the plurality of conductive pillars. The redistribution substrate has a third surface and a fourth surface opposite to the third surface. The third surface of the redistribution substrate faces the first surface of the first semiconductor chip, the plurality of conductive pillars are electrically connected to the first surface of the first semiconductor chip and the third surface of the redistribution substrate, and the fourth surface of the redistribution substrate is electrically connected to the substrate of the semiconductor package.