Stacked Semiconductor Package Bonding Using Oxide-Coated Dummy Pads

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Solution Overview

Problem

Semiconductor packages face challenges in maintaining strong bonding strength and reliability due to stress concentration at the interface between the base structure, semiconductor chips, and the molded layer, leading to potential peeling issues during planarization processes.

Innovation Solution

Incorporation of dummy pads with a metal oxide film on the base structure to improve planarization quality and enhance bonding strength by ensuring direct contact between the molded layer and the dummy pads, thereby stabilizing the interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If dummy pads are added to the base structure, then bonding strength between the base structure and molded layer is improved, but device complexity increases

Engineering Contradiction:
Improvebonding strengthVSAvoiddevice complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

Dummy pads are formed on the base structure before the molded layer is applied. This preliminary action ensures that when the molded layer is subsequently deposited, it directly contacts the dummy pads, creating strong bonding interfaces before any peeling or stress issues can occur during later packaging processes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy pads act as intermediary elements between the base structure and the molded layer. These intermediate pads provide additional bonding surfaces that mediate the interface between the two main components, distributing stress and preventing direct peeling at the critical base structure-molded layer interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the interface between base structure, semiconductor chips, and molded layer is simplified, then device complexity is reduced, but stress concentration and peeling issues worsen

Engineering Contradiction:
Improvedevice complexityVSAvoidreliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The bonding interface is segmented into multiple discrete bonding regions by forming multiple dummy pads distributed across the base structure. Instead of a single continuous interface, the stress is distributed across multiple localized bonding points, preventing concentration of stress at any single point and reducing peeling risk.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of dummy pads with a metal oxide film enhances the bonding strength between the base structure and the molded layer, preventing peeling and ensuring reliable electrical and mechanical connections in semiconductor packages.

Implementation Method 1

dummy pads with a metal oxide film on the base structure to improve planarization quality and enhance bonding strength by ensuring direct contact between the molded layer and the dummy pads

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS12588567B2Semiconductor package
Publication Date: 2026.03.24 SAMSUNG ELECTRONICS CO LTD
  • US12588567B2 patent drawing
  • US12588567B2 patent drawing
  • US12588567B2 patent drawing

AI summary

A semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips stacked on the first semiconductor chip, and having widths narrower than a width of the first semiconductor chip, and a molded layer on an upper surface of the first semiconductor chip. The first semiconductor chip includes first front-surface pads, a first back-surface insulating layer divided into a first region and a second region, first back-surface pads in the first region, dummy pads in the second region, the dummy pads respectively having an upper surface on which a metal oxide film is disposed, and a first through-electrode electrically connecting the first front-surface pads and the first back-surface pads to each other. The plurality of second semiconductor chips respectively includes second front-surface pads, second back-surface pads, and a second through-electrode electrically connecting the second front-surface pads and the second back-surface pads to each other.