Stacked Semiconductor Package Thermal Path Through Vias and Posts

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Solution Overview

Problem

Semiconductor packages face challenges in efficiently dissipating heat generated by multiple chips, which can compromise their reliability and performance.

Innovation Solution

A semiconductor package design featuring a through via, wiring structure, and conductive post that facilitate heat dispersion through a heat transfer material layer and heat dissipation member, enhancing thermal connectivity and improving heat dissipation characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple chips are stacked to increase data processing capacity, then productivity is improved, but heat generation increases causing reliability degradation

Engineering Contradiction:
Improvedata processing capacityVSAvoidproduct reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the heat dissipation function into multiple segments: heat transfer material layer for initial heat absorption, molding layer with conductive posts for heat distribution, and heat dissipation member for final heat rejection. This segmented approach allows heat to be managed at different stages, enabling high-density chip stacking while maintaining reliability through effective thermal management.

Inventive Principle:
Principle #1Segmentation

2Temperature

If heat dissipation structures are added to improve thermal performance, then temperature control is improved, but device complexity increases

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidpackage structure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into integrated structures: the molding layer simultaneously provides mechanical protection and thermal management by incorporating conductive posts; the conductive posts serve both electrical connection and heat conduction purposes; the heat transfer material layer is integrated between the chip stack and molding layer to provide both thermal interface and structural bonding. This merging reduces overall device complexity while achieving effective heat dissipation.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively disperses heat generated by semiconductor chips, improving product reliability and thermal performance.

Implementation Method 1

a heat transfer material layer on the molding layer; and a heat dissipation member on the heat transfer material layer

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS20250336897A1Semiconductor package
Publication Date: 2025.10.30 SAMSUNG ELECTRONICS CO LTD
  • US20250336897A1 patent drawing
  • US20250336897A1 patent drawing
  • US20250336897A1 patent drawing

AI summary

A semiconductor package includes a first semiconductor chip; an insulating layer on a side face of the first semiconductor chip; a through via which extends through the insulating layer; a wiring structure which is electrically connected to the first semiconductor chip and the through via, on the first semiconductor chip and the insulating layer; a chip stack on the wiring structure; a molding layer on at least a part of the chip stack and on the wiring structure; and a conductive post which extends through the molding layer and is electrically connected to the wiring structure.