Stacked Semiconductor Package Layout for Yield and Thermal Isolation
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Solution Overview
Problem
Existing semiconductor package structures face increased manufacturing costs and difficulties as semiconductor dies incorporate more functions, and there is a need for improved designs that enhance yield and performance.
Innovation Solution
The semiconductor package structure is redesigned with semiconductor die partitions, incorporating multiple semiconductor dies and features like redistribution layers, through vias, and a deep trench capacitor to reduce manufacturing costs and improve thermal and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If semiconductor dies include more functions, then device functionality is improved, but manufacturing cost and difficulty increase
Solution Approach 1:
The invention divides a single complex semiconductor die into multiple smaller semiconductor dies, each performing specific functions. These dies are stacked vertically and interconnected through through-vias and redistribution layers, enabling high functionality while simplifying individual die manufacturing processes and improving yield.
Solution Approach 2:
The invention transitions from a planar single-die architecture to a three-dimensional stacked architecture. By stacking multiple dies vertically and using through-vias for interconnection, the system achieves enhanced functionality without increasing the footprint, while distributing manufacturing complexity across multiple simpler dies.
2Ease of manufacture
If a single large semiconductor die is used, then manufacturing is simpler, but yield and performance are reduced
Solution Approach 1:
The invention segments a single large die into multiple smaller dies stacked vertically. Each smaller die can be manufactured with higher yield due to reduced size and complexity. The modular architecture allows independent manufacturing and testing of each die, improving overall production yield while maintaining manufacturing simplicity through standardized processes.
3Reliability
If functions are distributed across multiple dies, then yield and performance improve, but electrical connection complexity increases
Solution Approach 1:
The invention uses redistribution layers and through-vias as intermediary structures to establish electrical connections between stacked semiconductor dies. The redistribution layers route signals between dies, while through-vias provide vertical interconnections, simplifying the electrical connection process despite the multi-die architecture and improving overall system reliability.
Data Source
AI summary
A semiconductor package structure includes a first redistribution layer, a first semiconductor die, a second through via, a molding material, a second semiconductor die, and a second redistribution layer. The first semiconductor die is disposed over the first redistribution layer and includes a first through via having a first width. The second through via is adjacent to the first semiconductor die and has a second width. The second width is greater than the first width. The molding material surrounds the first semiconductor die and the second through via. The second semiconductor die is disposed over the molding material and is electrically coupled to the first through via and the second through via. The second redistribution layer is disposed over the second semiconductor die.