Stacked PCB Components with Localized Solder Resist Insulation
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Solution Overview
Problem
Existing printed circuit boards face challenges in achieving a space-saving arrangement of components while maintaining the required insulation resistance, particularly in applications requiring explosion protection and high-frequency components, due to limited space and minimum distance requirements.
Innovation Solution
A printed circuit board design where a first film serves as a solder resist layer, covering at least one component perpendicularly to the board surface, allowing for a space-saving arrangement by using a foil as a solder resist layer to cover components, and optionally using multiple films with varying thicknesses to achieve localized high insulation resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform solder resist layer is applied to the entire circuit board surface, then insulation resistance is improved, but component placement flexibility and space utilization deteriorate
Solution Approach 1:
The patent applies solder resist selectively only in insulating areas rather than uniformly across the entire board surface. This localized application maintains the required insulation resistance in non-conducting regions while leaving conducting areas exposed for component placement, thereby resolving the contradiction between insulation performance and placement flexibility.
Solution Approach 2:
The circuit board surface is segmented into distinct insulating areas and conducting areas. The solder resist is applied only to the insulating segments, creating a differentiated structure that provides insulation where needed while maintaining component accessibility in conducting zones, thus balancing insulation resistance with placement flexibility.
2Reliability
If minimum distance requirements are maintained between components and conductor tracks, then explosion protection and high-frequency performance are improved, but board space utilization deteriorates
Solution Approach 1:
The solder resist is applied locally only in insulating areas where explosion protection and high-frequency performance are critical, rather than creating uniform clearance zones throughout the board. This localized insulation approach maintains safety distances where needed while maximizing space utilization in non-critical areas.
Solution Approach 2:
Instead of maintaining minimum distances in the planar dimension (which reduces space utilization), the patent uses the vertical dimension by applying solder resist as a protective layer in insulating areas. This dimensional transition allows safety requirements to be met without compromising board space efficiency.
3Reliability
If solder resist is applied as a thick foil layer, then insulation resistance is improved, but manufacturing complexity and cost deteriorate
Solution Approach 1:
The patent applies the thick foil solder resist layer selectively only in insulating areas where high insulation resistance is required, rather than covering the entire board surface. This localized thick-film application reduces the total amount of material needed and simplifies the manufacturing process while maintaining the insulation performance benefits.
Solution Approach 2:
Instead of applying a thin solder resist layer uniformly across the entire board (which would require complex masking and alignment), the patent applies a thick foil layer partially only in insulating areas. This partial application of excessive thickness where needed simplifies manufacturing by reducing the precision requirements for full-surface coverage while achieving the required insulation resistance.
Data Source
Figure 1~3
AI summary
The invention relates to a printed circuit board (1), wherein solder contacts (2) with components (31, 32,...) soldered thereon, conductor tracks (4) and areas (5) isolating the solder contacts (2) and/or the conductor tracks (4) from each other are provided on at least one surface (11) of the printed circuit board (1). A first film (61) acting as a solder stop layer is applied to at least one first portion of the isolating areas (5), preferably the major part of the isolating areas (5). At least one of the components (31) is arranged in a direction (RS) which is substantially perpendicular to the surface (11) of the printed circuit board (1) between the printed circuit board (1) and the first film and is at least partially, particularly completely, covered by the first film (4).