Stacked Qubit Circuit Layout for Coherence and Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing quantum computing technologies face challenges in maintaining qubit coherence due to interactions with lossy materials and control wiring, limiting qubit density and coupling capabilities.
Innovation Solution
A stacked quantum computing device design where superconducting qubits are isolated on a first chip with high-quality materials, while control wiring and readout elements are on a separate second chip, shielded by a dielectric and superconductor layers to reduce interference and decoherence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If control wiring and readout elements are integrated on the same chip as superconducting qubits, then device complexity is reduced, but qubit coherence deteriorates due to interactions with lossy materials and control wiring
Solution Approach 1:
The device is divided into two separate chips: a first chip containing superconducting qubits and a second chip containing control wiring and readout elements. This segmentation isolates the qubits from lossy materials and control wiring, reducing decoherence while maintaining functional integration through chip-to-chip coupling.
Solution Approach 2:
A dielectric layer with superconductor ground plane acts as an intermediary between the first chip (qubits) and second chip (control wiring). This intermediate structure provides electromagnetic shielding and isolation, reducing harmful interactions while enabling controlled coupling for readout and control operations.
2Productivity
If qubit density is increased on a single chip, then productivity is improved, but qubit coherence deteriorates due to increased interactions with lossy materials
Solution Approach 1:
The device transitions from two-dimensional planar integration to three-dimensional stacked architecture. By placing control wiring and readout elements on a separate chip in the vertical dimension, the system achieves high qubit density on the first chip without increasing in-plane interactions with lossy materials, thereby maintaining coherence.
3Reliability
If shielding layers are added to protect qubits from control wiring interference, then qubit coherence is improved, but device complexity increases
Solution Approach 1:
The shielding function is merged with the dielectric layer that is already required for electrical isolation between chips. The dielectric layer incorporates a superconductor ground plane that provides both structural support/dielectric isolation and electromagnetic shielding, eliminating the need for separate shielding layers and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances qubit density and coupling by reducing decoherence, allowing for more complex computations with improved coherence and layout flexibility.
Implementation Method 1
a dielectric layer covering the control wire, and a shielding layer covering the dielectric layer
Implementation Method 2
a first chip that includes a first dielectric substrate and a superconducting qubit on the first dielectric substrate
Data Source
AI summary
A stacked quantum computing device including a first chip that includes a first dielectric substrate and a superconducting qubit on the first dielectric substrate, and a second chip that is bonded to the first chip and includes a second dielectric substrate, a qubit readout element on the second dielectric substrate, a control wire on the second dielectric substrate, a dielectric layer covering the control wire, and a shielding layer covering the dielectric layer.