Stacked SCR With Resistor Link For High Holding Voltage
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Solution Overview
Problem
Existing SCR protection circuits face challenges where stacking SCRs to increase holding voltage also doubles the triggering voltage, leading to potential damage from ESD events due to high holding voltage after the event ends.
Innovation Solution
The solution involves stacking two SCRs where the triggering voltage remains that of a single SCR, achieved by connecting a first PNP transistor to a first NPN transistor and a second PNP transistor to a second NPN transistor, with resistors forming each SCR, and a resistive connection between the SCRs to ensure the holding voltage is the sum of both, while the triggering voltage is maintained at a single SCR level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two SCRs are stacked to increase holding voltage, then the holding voltage doubles, but the triggering voltage also doubles becoming too high
Solution Approach 1:
The invention segments the SCR triggering function from the holding function by using separate transistor pairs (Q1-Q2 for triggering, Q3-Q4 for holding) with different characteristics. The first transistor pair has lower breakdown voltages to enable triggering at acceptable voltage levels, while the second transistor pair has higher breakdown voltages to provide the desired high holding voltage.
Solution Approach 2:
Different parts of the stacked SCR structure have different electrical characteristics tailored to their specific functions. The lower SCR section is designed with components optimized for triggering sensitivity, while the upper SCR section is designed with components optimized for high-voltage holding capability.
2Reliability
If diodes are stacked in series with an SCR to raise holding voltage, then the holding voltage increases to a suitable level, but the triggering level becomes too high requiring other techniques
Solution Approach 1:
The invention divides the voltage regulation function into two separate transistor pairs with different breakdown characteristics, allowing independent optimization of triggering and holding voltages rather than using a single SCR or diode stack approach.
Solution Approach 2:
The invention changes the electrical parameters of different transistor pairs within the stacked structure - specifically the breakdown voltages and current gains - to achieve the desired overall triggering and holding voltage characteristics that cannot be obtained with uniform components.
Data Source
AI summary
Stacked SCR's are disclosed with a resistor connecting an internal portion of the upper SCR to an internal portion of the lower SCR. The anode of the protective circuit is connected to a contact on a target circuit to be protected and the cathode of the protective circuit is connected to ground or a reference voltage on the target circuit. The anode voltage is directed to the lower SCR via the resistor such that when the voltage on the anode reaches the triggering voltage of the lower SCR, that SCR triggers and that triggering triggers the upper SCR, such that the stacked SCR's both trigger and thereby limit the voltage between the anode and the cathode and thereby protecting the target circuit.