Stacked Semiconductor Device Asymmetric Protection Diode Connection Test

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Solution Overview

Problem

In stacked semiconductor devices where power supply lines are shared, existing connection tests struggle to precisely determine whether connections are normal or open due to identical forward ON voltage settings of protection diodes in both semiconductor chips, leading to inaccurate detection.

Innovation Solution

The forward ON voltage of the protection diodes in the first semiconductor chip is set higher than those in the second semiconductor chip, allowing for distinct voltage readings during connection tests, enabling precise identification of normal, open, or short circuit conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the forward ON voltage of protection diodes in both semiconductor chips is set identically, then the device structure is simple and manufacturing is easy, but the connection test precision deteriorates because it cannot distinguish between normal and open connections

Engineering Contradiction:
Improveease of manufactureVSAvoidconnection test precision
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent applies asymmetry by setting different forward ON voltages for protection diodes in different semiconductor chips. Specifically, the first semiconductor chip has protection diodes with a first forward ON voltage, while the second semiconductor chip has protection diodes with a second forward ON voltage that is higher than the first. This asymmetric voltage configuration enables the connection test to distinguish between normal connections (detecting the lower first forward ON voltage) and open connections (detecting only the higher second forward ON voltage or no voltage), thereby resolving the measurement precision problem while maintaining manufacturing simplicity.

Inventive Principle:
Principle #4Asymmetry

2Measurement precision

If the forward ON voltage of protection diodes in the first semiconductor chip is set higher than in the second chip, then the connection test precision is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improveconnection test precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the forward ON voltage parameter of the protection diodes. The first semiconductor chip is designed with protection diodes having a first forward ON voltage, while the second semiconductor chip is designed with protection diodes having a second forward ON voltage that is higher than the first. This parameter differentiation is achieved through standard semiconductor manufacturing processes by adjusting diode design parameters (such as area, doping concentration, or series resistance) during the chip fabrication stage, rather than adding complex external components or test equipment. Consequently, the connection test precision is improved without significantly increasing device or manufacturing complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for precise connection testing even when power supply lines are shared, ensuring accurate detection of normal, open, or short circuit conditions, thereby improving the reliability of the stacked semiconductor device.

Implementation Method 1

a forward ON voltage of the first and second protection diodes of the first semiconductor chip is set higher than a forward ON voltage of the first and second protection diodes of the second semiconductor chip

Methodology Applied
Scientific EffectForward ON voltage: Diode

Data Source

PatentUS8441278B2Stacked semiconductor device and method of connection test in the same
Publication Date: 2013.05.14 SHINKO ELECTRIC IND CO LTD
  • US8441278B2 patent drawing
  • US8441278B2 patent drawing
  • US8441278B2 patent drawing

AI summary

A stacked semiconductor device includes a first semiconductor device equipped with a first semiconductor chip 14 having a transistor circuit and protection diodes, and a second semiconductor device equipped with a second semiconductor chip 24 having a transistor circuit and protection diodes, and stacked on the first semiconductor device via a connection portion, wherein a power supply line connected to the first and second semiconductor chips is used in common, and a forward ON voltage of the protection diodes of the first semiconductor chip is set higher than a forward ON voltage of the protection diodes of the second semiconductor chip 24. When a connection test is executed, the forward ON voltage of the protection diodes of the first semiconductor chip or the second semiconductor chip is detected and then normal/open is judged.