Stacked Semiconductor Chips With Insulating Sheet Sealing
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Solution Overview
Problem
Existing semiconductor devices with non-contact signal transmission between chips face limitations in dielectric breakdown voltage due to the path length of insulating films, which affects the creeping distance and reliability of signal transmission.
Innovation Solution
A semiconductor device configuration with a first and second semiconductor chip stacked face-to-face, separated by an insulating sheet and sealed with a sealing member, which increases the creeping distance and dielectric strength by positioning the sealing member between the insulating sheet and the chips, allowing for a larger interface area and improved dielectric breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the insulating film is located outside the first semiconductor chip to increase creeping distance, then dielectric breakdown voltage is improved, but the path length from the first semiconductor chip to the second semiconductor chip becomes longer
Solution Approach 1:
The sealing member is positioned at the interface between the insulating sheet and both semiconductor chips, creating a three-dimensional sealing structure that increases creeping distance without extending the vertical path length between chips. This multi-dimensional arrangement allows the sealing member to provide both electrical isolation and mechanical sealing functions simultaneously.
Solution Approach 2:
The sealing member is disposed within the package structure, nested between the insulating sheet and the semiconductor chips. This nested configuration allows the sealing member to be integrated into the existing package architecture, providing enhanced dielectric strength and creeping distance without adding external bulk or extending the signal path between chips.
2Reliability
If the sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip, then creeping distance and dielectric strength are increased, but device complexity increases
Solution Approach 1:
The sealing member performs multiple functions simultaneously: it provides electrical insulation between the insulating sheet and both semiconductor chips, creates mechanical sealing to prevent moisture and contaminant ingress, and establishes the necessary creeping distance for high voltage isolation. This multi-functional design reduces the need for separate components and simplifies the overall device structure.
Solution Approach 2:
The sealing member combines the functions of electrical insulation, mechanical sealing, and structural support into a single integrated component. By merging these functions, the design avoids the complexity of multiple separate elements while achieving the required creeping distance and dielectric strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration enhances the dielectric strength and creeping distance, thereby improving the reliability and performance of digital isolators by increasing the withstand voltage and prolonging the time to failure.
Implementation Method 1
an occurrence of dielectric breakdown between the first semiconductor chip and the second semiconductor chip is suppressed
Data Source
AI summary
A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.