Stacked Semiconductor Device for Channel Width and Heat Dissipation
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Solution Overview
Problem
Next-generation MOSFETs face limitations in enlarging channel width due to the restricted footprint and downscaling challenges in FinFETs, making it difficult to increase channel width per unit area without increasing the semiconductor device's footprint on the wafer.
Innovation Solution
The semiconductor device design includes multiple stacked semiconductor layers extending in a specific direction with conductors and insulating films, allowing for increased channel width without expanding the footprint by using contact plugs and heat dissipation mechanisms to manage Joule heat and temperature, enabling efficient current driving capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If FinFET structure is used to reduce footprint, then area is reduced, but channel width enlargement is limited
Solution Approach 1:
The patent transitions from a planar FinFET structure to a three-dimensional stacked configuration where multiple semiconductor layers are vertically stacked. This vertical stacking enables channel width enlargement by adding layers in the vertical dimension while keeping the horizontal footprint small, directly resolving the contradiction between reduced footprint and limited channel width enlargement.
Solution Approach 2:
The patent implements a nested structure where multiple semiconductor layers are stacked vertically, with each layer containing a channel region. The layers are arranged concentrically around a central axis, with inner layers having smaller circumferences than outer layers. This nesting approach allows multiple channels to be packed within a compact footprint while providing substantial total channel width through the cumulative effect of multiple layers.
2Power
If channel width is enlarged to increase current driving capability, then current driving capability is improved, but footprint increases
Solution Approach 1:
The patent achieves enhanced current driving capability by stacking multiple semiconductor layers vertically, utilizing the vertical dimension to multiply the effective channel width without expanding the horizontal footprint. Each layer contributes to the total current carrying capacity, allowing power improvement while maintaining compact area.
Solution Approach 2:
The patent combines multiple semiconductor layers into a single integrated stacked structure, where the channels of individual layers are electrically connected in parallel. This merging of multiple channels into one unified device provides cumulative current driving capability equivalent to a single large-channel device, but achieved through compact vertical stacking rather than horizontal expansion.
3Area of stationary object
If multiple stacked semiconductor layers are used to widen channel width, then channel width per unit area is increased, but self-heating degradation occurs
Solution Approach 1:
The patent segments the heat dissipation function by introducing separate heat dissipation structures positioned adjacent to each semiconductor layer. These structures provide dedicated thermal pathways for each layer, preventing heat accumulation in the stacked configuration. The segmentation of thermal management allows high channel width density while controlling temperature through distributed heat dissipation.
Solution Approach 2:
The patent introduces heat dissipation structures as intermediary elements between the semiconductor layers and the substrate. These structures act as thermal mediators, conducting heat away from the active channels and dissipating it through dedicated pathways. This intermediary thermal management system enables the stacked configuration to achieve high channel width per unit area while preventing self-heating degradation through efficient heat removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively widens the channel width per unit area, enhancing current driving capability while maintaining a reduced footprint, and effectively suppresses self-heating degradation through efficient heat dissipation, thus overcoming the limitations of existing FinFETs.
Implementation Method 1
a gate electrode facing a portion between the first end and the second end of the first semiconductor layer and facing a portion between the first end and the second end of the second semiconductor layer
Implementation Method 2
efficiently suppresses self-heating degradation
Implementation Method 3
efficient heat dissipation
Data Source
AI summary
A semiconductor device includes a substrate; a first semiconductor layer above the substrate, a second semiconductor layer between the substrate and the first semiconductor layer, first and second conductors, an electrode, and first and second insulating films. The first and second semiconductor layers have a first end and a second end opposite to the first end. The first conductor is connected to the first ends of the first and second semiconductor layers. The second conductor includes a first portion connected to the second ends of the first and second semiconductor layers and a second portion positioned inside the substrate. The electrode faces portions of first and second semiconductor layers between the first end and the second end thereof. The first insulating film is provided between the first semiconductor layer and the electrode; and the second insulating film is provided between the second semiconductor layer and the electrode.