Stacked Semiconductor Lead Folding for Package Replacement
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Solution Overview
Problem
Existing semiconductor devices with stacked packages face challenges in easily replacing defective packages after stacking, leading to increased fabrication costs due to complex lead arrangements and lack of efficient replacement methods.
Innovation Solution
The semiconductor device design includes leads drawn from stacked packages that are folded around the outer shapes and extended over the upper surfaces, with holders affixing the packages so that first and second leads from lower and upper stages contact each other, allowing for easy replacement and reduced fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple semiconductor packages are stacked using conventional lead arrangements, then the mount area is reduced, but the complexity of lead arrangement increases and defective packages become difficult to replace
Solution Approach 1:
The lead arrangement is segmented into multiple independent loops, each connecting adjacent semiconductor packages. Each loop can be independently manipulated, allowing defective packages to be removed and replaced without affecting other connections. This segmentation reduces the overall complexity of the lead arrangement system.
Solution Approach 2:
The lead arrangement incorporates flexible, movable sections that can be dynamically adjusted during the replacement process. The leads are designed to be bendable and reconfigurable, enabling easy insertion and removal of defective packages while maintaining electrical connections throughout the stacked structure.
2Area of stationary object
If multiple semiconductor packages are stacked using conventional lead arrangements, then the mount area is reduced, but the ease of replacing defective packages deteriorates
Solution Approach 1:
The lead arrangement is segmented into multiple independent loops, each connecting adjacent semiconductor packages. Each loop can be independently manipulated, allowing defective packages to be removed and replaced without affecting other connections. This segmentation reduces the overall complexity of the lead arrangement system.
Solution Approach 2:
The lead arrangement incorporates flexible, movable sections that can be dynamically adjusted during the replacement process. The leads are designed to be bendable and reconfigurable, enabling easy insertion and removal of defective packages while maintaining electrical connections throughout the stacked structure.
3Length of stationary object
If leads are folded around the outer shapes of semiconductor packages, then the device height is minimized, but the manufacturing precision requirements increase
Solution Approach 1:
Different sections of the lead arrangement have different geometric configurations optimized for their specific functions. Leads connecting adjacent packages follow outer contour paths, while leads connecting opposite sides use straight-line configurations. This local optimization reduces the overall manufacturing precision requirements while maintaining compact device height.
Solution Approach 2:
The leads are pre-formed and pre-positioned on each semiconductor package before stacking. The folding and routing of leads are prepared in advance during package manufacturing, reducing the precision requirements during the final assembly process. Pre-formed lead configurations ensure proper alignment and connection when packages are stacked.
Data Source
AI summary
The present invention provides a semiconductor device that includes semiconductor packages arranged in a stacked configuration. A plurality of leads are drawn from the stacked semiconductor packages and folded around the outer shape of each semiconductor package such that the leads extend over the upper surfaces of the semiconductor package. Holders affix the stacked semiconductor packages so that first and second leads contact each other, the first leads being drawn from a first one of the stacked semiconductor packages at a lower stacking stage, and the second leads being drawn from a second one of the stacked semiconductor packages at an adjacent, upper stacking stage.


