Stacked Semiconductor Package Void Elimination
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Solution Overview
Problem
The challenge in creating stacked semiconductor packages is the difficulty in completely filling voids between chips, leading to defects due to the decreasing gap between stacked semiconductor chips, which existing gap-fill technologies struggle to address effectively.
Innovation Solution
The semiconductor package design incorporates a projection on the second surface of each chip, a reinforcing layer, and a gap-fill member with hydrophilic or lipophilic substances, along with through-electrodes and guide members to facilitate even filling and prevent voids, ensuring effective stacking and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If gap-fill material is used to fill voids between stacked semiconductor chips, then data storage capacity and data processing speed are improved, but voids still persist or are created between the chips due to decreasing gap size
Solution Approach 1:
The gap-fill material is segmented into multiple parts: a first gap-fill material placed in the gap between chips and a second gap-fill material filling voids within the first material. This segmentation allows each material to serve specific functions - the first material provides structural support while the second material fills remaining voids, collectively preventing defect formation.
Solution Approach 2:
Different regions of the gap-fill structure use different materials with optimized properties. The first gap-fill material has properties suitable for void filling and structural support, while the second gap-fill material has properties optimized for complete void elimination. This local differentiation ensures optimal performance in each region.
2Volume of stationary object
If the gap between stacked semiconductor chips is decreased to increase density, then package volume is reduced, but it becomes increasingly difficult to completely fill voids with gap-fill material
Solution Approach 1:
The gap-fill process is segmented into multiple stages with different materials. The first gap-fill material is applied initially to provide structural support, followed by the second gap-fill material that specifically targets and fills remaining voids. This segmented approach enables complete void filling even in reduced-gap configurations.
Solution Approach 2:
The first gap-fill material is applied as a preliminary step before the second material. This preliminary action establishes a foundation structure that supports subsequent void filling, ensuring that even when gaps are small, the voids can be completely eliminated through the staged process.
3Device complexity
If conventional gap-fill technology is used, then stacking of semiconductor chips is achieved, but defects occur due to persistent voids between chips
Solution Approach 1:
The gap-fill structure uses composite materials consisting of two different gap-fill materials with complementary properties. The first material provides structural support and initial void filling, while the second material eliminates remaining voids. This composite approach ensures both stacking capability and defect-free operation.
Solution Approach 2:
The invention changes material parameters by selecting gap-fill materials with different physical and chemical properties. The first material has parameters optimized for structural support, while the second material has parameters optimized for complete void filling. This parameter differentiation eliminates defects while maintaining stacking functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes the occurrence of voids between stacked semiconductor chips, enhancing the reliability and performance of the semiconductor package without increasing its volume, thereby improving data storage and processing capabilities.
Implementation Method 1
a gap-fill member interposed between the stacked semiconductor chips and containing any one of a hydrophilic substance and a lipophilic substance
Implementation Method 2
coating layers placed on the first surface and second surface and containing any one of a hydrophilic substance and a lipophilic substance
Data Source
AI summary
A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.


