Stacked Semiconductor Device Stepped Pad Thermal Expansion

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Solution Overview

Problem

Bonding failures occur between insulating layers in stack-type semiconductor devices due to thermal expansion of metal pads during the bonding process of silicon wafers, leading to electrical connectivity issues.

Innovation Solution

The semiconductor device features a lower and upper pad with stepped structures, where the thicker portions of the pads are aligned diagonally and the thinner portions are bonded, minimizing thermal expansion and reducing the repulsive force between the pads, thereby mitigating bonding failures between the interlayer insulating layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal pads are used for bonding silicon wafers, then electrical connectivity between wafers is achieved, but thermal expansion of the metal pads causes bonding failure between insulating layers

Engineering Contradiction:
Improvebonding reliabilityVSAvoidthermal expansion effect
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The pad structure is segmented into two distinct portions: a first portion with greater thickness and a second portion with lesser thickness. This segmentation allows the pad to function both as an electrical conductor and as a structure that minimizes thermal expansion effects during bonding, thereby resolving the contradiction between maintaining electrical connectivity and preventing bonding failure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the pad are given different thicknesses to serve different functions. The first portion (thicker) provides structural stability and reduced thermal expansion, while the second portion (thinner) ensures proper electrical contact. This local differentiation of properties resolves the contradiction by optimizing each region for its specific function.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If uniform thickness pads are used, then manufacturing is simpler, but thermal expansion causes repulsive force leading to bonding failure

Engineering Contradiction:
Improvepad fabrication simplicityVSAvoidbonding success rate
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The pad is divided into segments of different thicknesses that can be formed through standard semiconductor fabrication processes such as selective etching or deposition. This segmentation approach maintains ease of manufacture using existing technology while improving bonding reliability by reducing thermal expansion effects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pad thickness parameter is changed across different regions of the pad structure. By varying the thickness parameter locally rather than uniformly, the design achieves better thermal expansion characteristics and bonding reliability while remaining compatible with standard manufacturing processes that can control film thickness.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces bonding failures between the interlayer insulating layers, ensuring stable electrical connections and improving the reliability of the semiconductor device by managing thermal expansion.

Implementation Method 1

a bonding failure can occur between insulating layers, at regions thereof beside the metal pads, due to thermal expansion of the metal pads caused by heat used for the process of bonding the silicon wafers

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS9859321B2Stack-type semiconductor device
Publication Date: 2018.01.02 SAMSUNG ELECTRONICS CO LTD
  • US9859321B2 patent drawing
  • US9859321B2 patent drawing
  • US9859321B2 patent drawing

AI summary

A stack-type semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower interconnection on the lower substrate, a lower pad on the lower interconnection, and a lower interlayer insulating layer covering side surfaces of the lower interconnection and the lower pad. The upper device includes an upper substrate, an upper interconnection under the upper substrate, an upper pad under the upper interconnection, and an upper interlayer insulating layer covering side surfaces of the upper interconnection and the upper pad. Each of the pads has a thick portion and a thin portion. The thin portions of the pads are bonded to each other, the thick portion of the lower pad contacts the bottom of the upper interlayer insulating layer, and the thick portion of the upper pad contacts the top of the lower interlayer insulating layer.