Three-Stacked Sense Amplifier for Low-Voltage Kickback Noise Reduction

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Solution Overview

Problem

Existing sense amplifiers struggle with high kickback noise and require higher minimum operating voltages, which affect signal accuracy and speed.

Innovation Solution

A sense amplifier design utilizing a configuration of three stacked transistors per circuit path, with source terminals coupled to a fixed voltage, reducing kickback noise and allowing operation at lower voltages and increased speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If conventional sense amplifier configuration is used, then device can operate, but kickback noise is high and minimum operating voltage is high

Engineering Contradiction:
Improvekickback noiseVSAvoidsignal accuracy
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The input circuit is divided into two separate paths: a first path with first transistors and a second path with second transistors. This segmentation isolates the signal paths and prevents kickback noise from one path from affecting the other, thereby reducing overall kickback noise while maintaining signal accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A differential pair of transistors is introduced as an intermediary between the input signals and the output circuit. This intermediary structure processes the differential signals and provides a clean path to the output, isolating the output from kickback noise generated in the input stage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If conventional sense amplifier configuration is used, then device can operate, but minimum operating voltage is high

Engineering Contradiction:
Improveoperating voltageVSAvoidoperational speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The sense amplifier employs dynamic clocking of the differential pair transistors, where the clock signal is phased relative to the input signals. This dynamic operation allows the amplifier to achieve high-speed performance at lower operating voltages by optimizing the timing of signal processing stages.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The amplifier uses periodic clock signals to control the operation of the differential pair transistors. By synchronizing the switching of these transistors with the input signal transitions, the circuit achieves fast signal processing while maintaining low voltage operation through efficient timing control.

Inventive Principle:
Principle #19Periodic action

3Object-affected harmful factors

If three stacked transistors configuration is used, then kickback noise is reduced and operation speed increases, but device complexity increases

Engineering Contradiction:
Improvekickback noiseVSAvoidtransistor configuration
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The differential pair of transistors serves multiple functions: it acts as a signal amplifier, a noise isolator, and a timing-controlled switch. By making this component multi-functional, the design reduces the need for additional separate circuits, thereby limiting the increase in overall device complexity despite the more complex transistor stacking.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260073958A1Sense Amplifier and Method Thereof
Publication Date: 2026.03.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260073958A1 patent drawing
  • US20260073958A1 patent drawing
  • US20260073958A1 patent drawing

AI summary

A sense amplifier includes a first pair of transistors having gate terminals respectively coupled to a first input terminal for receiving a first input signal and to a second input terminal for receiving a second input signal, source terminals coupled to a first power supply terminal, and drain terminals. The sense amplifier also includes a second pair of transistors having gate terminals coupled to a clock terminal, source terminals respectively coupled to the drain terminals of the first pair of transistors, and drain terminals. The sense amplifier also includes a third pair of transistors having gate terminals coupled to the clock terminal, drain terminals respectively coupled to the drain terminals of the second pair of transistors, and source terminals coupled to a second power supply terminal. In addition, the sense amplifier includes an output circuit coupled to the drain terminals of the second pair of transistors and having an output terminal.