Stacked Stripline Circuits for High-Frequency Low-Loss RF Design

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Solution Overview

Problem

Existing high-frequency radio-frequency (RF) passive circuits face challenges in constrained spaces, particularly above 1 GHz, due to poor manufacturing yield, board-to-board performance variation, and the need for low loss and maximum out-of-band rejection, which conventional lumped-element and distributed element designs fail to address effectively.

Innovation Solution

The design involves stacking stripline circuits vertically between ground layers, allowing for multiple high-frequency, low-loss passive elements in a small footprint, using distributed element filters with shared ground planes and via connections for efficient signal routing and shielding, eliminating the need for external shielding and reducing component count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If distributed element designs are used for high frequency circuits, then low loss and out-of-band rejection are improved, but the physical dimensions become prohibitively large for constrained board space

Engineering Contradiction:
Improveinsertion lossVSAvoidboard space
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

The patent transitions from planar distributed element layouts to a three-dimensional stacked stripline architecture. Multiple circuit layers are vertically stacked with signal paths extending through vias between layers, effectively utilizing the Z-dimension to reduce the footprint on each individual layer while maintaining the electrical length required for distributed element operation at high frequencies

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If lumped-element filters are used for frequencies above 1 GHz, then component count is reduced, but manufacturing yield deteriorates and performance variation increases

Engineering Contradiction:
Improvecomponent countVSAvoidperformance consistency
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent replaces discrete lumped-element components (capacitors, inductors) with integrated stripline distributed element structures fabricated directly on the circuit board. This substitution eliminates separate components and their associated tolerances, achieving both frequency performance above 1 GHz and improved manufacturing consistency through a monolithic construction approach

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If multiple filters are implemented in constrained board space, then functionality is improved, but the physical dimensions of distributed elements become prohibitively large

Engineering Contradiction:
Improvefilter functionalityVSAvoidboard space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple filter circuits into a single stacked assembly where different filter functions are implemented on different vertical layers. Shared ground planes and via structures are merged between layers, allowing multiple filters to coexist in a compact volume that would otherwise require excessive planar space

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a nested vertical architecture where circuit layers are stacked one within another, with lower layers providing support structures (ground planes, via holes) that are shared by upper layers. This nesting approach maximizes the use of vertical space while minimizing the horizontal footprint, enabling multiple filters to be integrated in constrained board space

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS7755457B2Stacked stripline circuits
Publication Date: 2010.07.13 L3HARRIS GLOBAL COMMUNICATIONS INC
  • US7755457B2 patent drawing
  • US7755457B2 patent drawing
  • US7755457B2 patent drawing

AI summary

The present invention provides a method and apparatus for design of low loss, size restricted high frequency circuits. In a preferred embodiment, an electronic device includes: a first circuit layer located above the main circuit board comprising a first stripline passive circuit; and a second circuit layer located above the first circuit, the second layer comprising a second stripline circuit. The two stripline circuits can be separately coupled to leads, or coupled to each other and other leads using vias through the ground layer(s) separating each stripline. The stacked stripline elements can be used together with other circuits, and the stacked circuit board can be conveniently joined together with other assemblies, e.g., by surface mounting to a main board. The utility of this topology can be extended by the use of n-circuit embodiment or embedding in a multilayered main circuit board.