High Frequency Circuit Adaptations TRIZ Cases
- Dual-Diameter Vias for PCB Crosstalk Reduction
Dual-diameter vias increase spacing between adjacent signal paths on printed circuit boards to minimize electromagnetic interference.
- Stacked Stripline Circuits for High-Frequency Low-Loss RF Design
Stacked stripline circuits use vertical layering to reduce insertion loss and out-of-band rejection in constrained high-frequency spaces.
- Dielectric Waveguide Connection Structure with Segmented Choke Passages
Segmented choke passages in multi-layer dielectric waveguides maintain precise electrical lengths despite adhesive thickness errors, suppressing wave leakage.
- Vinyl Aromatic Copolymer Resin for High-Frequency PCBs
A vinyl aromatic copolymer resin composition improves toughness and drilling processability for circuit substrates.
- PCB Resonator Shell via Inverted Recess for Radar Level Measurement
A printed circuit board integrates a microwave resonator shell formed by an annular rear-side recess to couple signals into a waveguide.
- Dual-Mode Connector for Backward Compatible 40 Gbps Transmission
A dual-mode connector switches between RJ45 and ARJ45 configurations to support high-speed data transmission.
- Filled Hollow Glass Filaments for PCB Dielectric Mismatch
Resin-filled hollow glass filaments mitigate signal skew by matching the effective dielectric constant of the filler to the surrounding polymeric matrix.
- Vertical RF Coupling Structure for Phased Array Antenna Feeds
Replacing mechanical vias with electromagnetic coupling reduces lamination cycles and manufacturing complexity in phased array antenna systems.
- Composite Film for High Frequency PCBs with Low Thermal Expansion
Layered polyimide films with controlled melt viscosity reduce thermal expansion without degrading adhesion to plated copper.
- Asymmetric Via Geometry for Void-Free Plating
Laser-drilled asymmetric via geometry reduces void formation during electrolytic plating, preventing line disconnection in high-density interconnect circuits.
- Via Impedance Optimization for High-Speed PCB Signal Integrity
A via impedance optimization method adjusts electrical parameters based on perceived signal rise time to maintain transmission quality.
- Transmission Line Impedance Matching via L-C-L Circuit
L-C-L circuit matches impedance in transmission line connecting portions, reducing reflection and insertion loss.
- Variable Thickness Circuit Board for Signal Integrity
Thinner substrate areas shorten vias to reduce signal degradation while thicker zones maintain structural integrity.