Stacked Substrate Protection Circuits for Mixed-Voltage Reliability
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Solution Overview
Problem
In semiconductor devices with stacked substrates driven by different voltages, existing configurations either compromise wiring reliability and pn junction integrity or increase circuit area due to inadequate protection circuit design, as protection circuits are either solely on high-voltage substrates or low-voltage substrates, leading to inefficiencies and potential breakdowns.
Innovation Solution
A semiconductor device design where protection circuits are formed on substrates based on their respective voltage levels, with high-voltage protection circuits on high-voltage substrates and low-voltage protection circuits on low-voltage substrates, optimizing circuit size and reliability by using thicker gate oxide films and larger insulation separation on high-voltage substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If protection circuits are formed only on the high-voltage substrate, then wiring reliability is maintained, but circuit area increases
Solution Approach 1:
The protection circuit functionality is segmented across two substrates: high-voltage protection circuits handle high-voltage discharge paths on the high-voltage substrate, while low-voltage protection circuits handle low-voltage protection on the low-voltage substrate. This segmentation allows each protection circuit to be optimized for its specific voltage level, reducing the overall circuit area compared to having all protection circuits on a single high-voltage substrate.
Solution Approach 2:
The protection circuit architecture transitions from a single-substrate two-dimensional layout to a multi-substrate three-dimensional stacked configuration. By utilizing the vertical stacking dimension, protection circuits for different voltage levels are distributed across multiple layers, reducing the planar area required on each individual substrate while maintaining comprehensive protection functionality.
2Reliability
If electrostatic protection circuits are formed on the low-voltage substrate for high-voltage substrate protection, then protection is provided, but high voltage application causes breakdown of pn junction
Solution Approach 1:
High-voltage protection circuits are specifically placed on the high-voltage substrate where they can handle high-voltage discharge paths without exposing low-voltage pn junctions to high voltage stress. Low-voltage protection circuits are placed on the low-voltage substrate for low-voltage protection. This local quality placement ensures that pn junctions on the low-voltage substrate are never exposed to high voltage that could cause breakdown, while still providing comprehensive electrostatic protection for both substrates.
Data Source
AI summary
A semiconductor device includes a first semiconductor substrate, a second semiconductor substrate stacked on the first semiconductor substrate, a first pad to which a first power supply voltage for driving an element on the first semiconductor substrate is externally input, a second pad to which a second power supply voltage for driving an element on the second semiconductor substrate is externally input, a first protection circuit disposed on the first semiconductor substrate, and a second protection circuit disposed on the second semiconductor substrate, wherein the first power supply voltage is higher than the second power supply voltage, wherein the first protection circuit is electrically connected to the first pad, and wherein the second protection circuit is electrically connected to the second pad.