Stacked Transistor Bonding With Shallow Plasma-Activated Isolation
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Solution Overview
Problem
Existing bonding techniques for stacked transistor structures face challenges in forming reliable insulation layers due to seam formation and etchant damage, particularly in advanced IC technology nodes, which can degrade performance and reliability.
Innovation Solution
Implementing plasma activated wafer bonding with controlled shallow plasma activation and dielectric layers, such as SiCN or SiN, to ensure the underlying superlattice structure is not impacted, and using a separate barrier layer to prevent H2O diffusion and oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bonding techniques are used for stacked transistor structures, then the manufacturing process is simpler, but seam formation and etchant damage occur that degrade reliability
Solution Approach 1:
The patent applies preliminary action by performing plasma activation on the bonding surfaces before the actual bonding process. This pre-treatment modifies the surface chemistry to enhance bonding quality and prevent seam formation, thereby improving reliability without requiring fundamental changes to the bonding process architecture
Solution Approach 2:
The patent employs parameter changes by carefully controlling plasma activation parameters (power, time, gas composition) and bonding parameters (temperature, pressure, alignment precision). These parameter optimizations enable high-quality bonding that prevents seam formation and etchant damage while maintaining process feasibility
2Reliability
If plasma activated wafer bonding is used, then seam formation and etchant damage are prevented, but the process complexity increases
Solution Approach 1:
The patent uses plasma activation as an intermediary step that mediates between the bonding surfaces. This intermediate treatment creates optimal surface conditions for bonding, preventing direct contact issues like seam formation and etchant damage while adding a controlled, repeatable process step
3Manufacturing precision
If deep plasma activation is used, then bonding surface preparation is more thorough, but the underlying superlattice structure is damaged
Solution Approach 1:
The patent applies local quality by concentrating the plasma activation effect specifically at the bonding surfaces while protecting the underlying superlattice structure. This is achieved through precise control of plasma parameters and exposure time, ensuring surface preparation quality without causing bulk material damage
4Reliability
If barrier layers are added to prevent H2O diffusion, then oxidation is prevented, but device structure becomes more complex
Solution Approach 1:
The patent applies universality by designing barrier layers that serve multiple functions: preventing H2O diffusion, providing mechanical support, and maintaining structural integrity. This multi-functionality approach prevents oxidation while minimizing the addition of structural complexity, as the same layers perform multiple protective roles
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of stacked transistor structures by preventing seam formation and etchant damage, ensuring the integrity of the underlying superlattice structure and channel layer.
Implementation Method 1
performing a plasma activation process to a first bonding surface of the first insulation layer and a second bonding surface of the second insulation layer to form a first plasma activated surface and a second plasma activated surface, respectively
Data Source
AI summary
Bonding techniques for stacked device structures are disclosed herein. An exemplary method includes forming a first insulation layer on a first device component and a second insulation layer on a second device component. A plasma activation process is performed to the first insulation layer and the second insulation layer. After the plasma activation process, an upper portion of the first insulation layer and the second insulation layer includes a plasma activated layer and a lower portion of the first insulation layer and the second insulation layer includes a barrier layer. The plasma activated layers of respective ones of the first insulation layer and the second insulation layer are bonded to form a stacked structure that includes the first device component over the second device component. The first insulation layer bonded to the second insulation layer forms an isolation structure between the first device component and the second device component.


