Stacked Trench Capacitor Structure for High Capacitance Density
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Solution Overview
Problem
There is a growing demand for capacitors with higher capacity to meet the requirements of miniaturized and thinned electronic products, but existing multilayer capacitors do not adequately address this need.
Innovation Solution
A capacitor design that includes a substrate with a first capacitor portion and a second capacitor portion, featuring multiple layers of plate-shaped electrodes and dielectric layers, along with external electrodes and connection portions, to enhance capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If existing multilayer capacitor structures are used, then the device complexity remains manageable, but the capacitance capacity is insufficient for miniaturized electronic products
Solution Approach 1:
The patent transitions from traditional planar capacitor electrode arrangements to a three-dimensional stacked configuration with multiple capacitor portions (first, second, and third capacitor portions) arranged vertically. Plate-shaped electrodes are stacked in multiple layers with dielectric layers interspersed, creating a vertical capacitance accumulation structure that significantly increases total capacitance within a compact footprint while maintaining manageable structural complexity through modular stacking
Solution Approach 2:
The capacitor is divided into multiple discrete capacitor portions (first capacitor portion with first plate-shaped electrode, second capacitor portion with second plate-shaped electrode, third capacitor portion with third plate-shaped electrode) that can be independently formed and connected. This segmentation allows each portion to contribute additively to the total capacitance while enabling systematic manufacturing and connection through external electrodes, resolving the contradiction between increased capacity and structural complexity
2Volume of moving object
If the capacitor size is reduced for miniaturization, then the device footprint is reduced, but the capacitance capacity decreases
Solution Approach 1:
The patent exploits the vertical dimension by stacking multiple plate-shaped electrodes and dielectric layers in the thickness direction of the substrate. This vertical stacking creates multiple capacitor units within the same planar footprint, achieving high capacitance capacity in a miniaturized device by transitioning from two-dimensional planar expansion to three-dimensional vertical accumulation
Solution Approach 2:
Multiple capacitor portions are nested vertically within the device structure, with each capacitor portion containing plate-shaped electrodes and dielectric layers that are stacked one above another. This nested arrangement allows the device to achieve high capacitance capacity by nesting multiple functional units within a compact volume, effectively addressing the miniaturization requirement while maintaining high capacity
Data Source
AI summary
A capacitor may include a substrate, a first capacitor portion disposed on the substrate, and a second capacitor portion disposed on the first capacitor portion. The first capacitor portion may include a first insulation layer having a plurality of trenches, a first electrode disposed on the first insulation layer and in the plurality of trenches, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.