Stacked Semiconductor Trenches for Cell Array Edge Defect Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with trenches are prone to defects at the edges of the cell array region due to mold leaning, which hinders high integration and reliability.
Innovation Solution
A semiconductor device design featuring a stack structure with trenches where the outermost dummy trench and source line are configured to have a higher lower end than adjacent trenches and source lines, minimizing defects by altering the trench and source line dimensions and positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If trenches are used to define cell blocks in a semiconductor device, then the degree of integration can be increased, but defects occur at the edges of the cell array region due to mold leaning
Solution Approach 1:
The patent applies preliminary action by forming dummy blocks and dummy trenches around the periphery of the cell array region before forming the main cell blocks. These dummy structures are prepared in advance to prevent mold leaning from affecting the main cell blocks, thereby reducing edge defects while maintaining high integration density.
Solution Approach 2:
The patent uses dummy blocks and dummy trenches as intermediary structures that act as buffers between the mold and the main cell blocks. These intermediary elements absorb the mechanical stress and preventing it from propagating to the functional cell blocks, thus reducing edge-related defects.
2Ease of manufacture
If the outermost trench is formed to the same depth as adjacent trenches, then manufacturing is simplified, but the trench becomes vulnerable to defects from mold leaning
Solution Approach 1:
The patent applies local quality by making the outermost trenches have different characteristics from the internal trenches. Specifically, the outermost dummy trenches are formed to extend to a lower level than the main trenches, creating a localized structural difference that provides additional support and prevents mold leaning at the edges while maintaining uniform manufacturing processes for the majority of trenches.
Solution Approach 2:
The patent forms dummy trenches with extended depth in advance at the outermost positions before forming the main cell structure. This preliminary deep trench formation creates a reinforced boundary that prevents mold leaning from affecting the main trenches, thereby protecting against defects while keeping the overall manufacturing process straightforward.
Data Source
AI summary
A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.