Stacked Semiconductor Trenches With Raised Outermost Dummy Trench

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Solution Overview

Problem

Semiconductor devices with trenches are prone to defects at the edges of the cell array region due to the vulnerability of the outermost trench, which affects the integration and reliability of the device.

Innovation Solution

The semiconductor device incorporates a design where the outermost dummy trench has a lower end formed higher than the adjacent trenches, with a narrower width, and the dummy source line also has a higher lower end, reducing defects at the edge of the cell array region and allowing for a higher degree of integration by minimizing the size and number of dummy blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the degree of integration is increased by using stack structures with high aspect ratio trenches, then productivity and integration level are improved, but the outermost trenches become vulnerable to defects caused by mold leaning

Engineering Contradiction:
Improvedegree of integrationVSAvoiddefect rate at edge regions
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a fill pattern in the outermost trench before completing the main fabrication process. This fill pattern prevents mold leaning from affecting the outermost trench during subsequent processing steps, thereby preventing defects before they occur. The fill pattern is formed in advance to stabilize the structure against the high aspect ratio trench vulnerability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by introducing a compensation pattern or fill material in the outermost trench region. This cushioning structure compensates for the mechanical stress and instability caused by the high aspect ratio, preventing mold leaning and subsequent defects. The cushioning element absorbs or mitigates the harmful effects before they can propagate to the functional trenches.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If dummy blocks are added to protect outermost trenches, then reliability is improved, but device complexity and area increase

Engineering Contradiction:
Improvedefect reduction at edgesVSAvoidnumber of dummy blocks
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the protective function from traditional dummy blocks and relocates it to the outermost trench itself by forming a fill pattern within the trench. This eliminates the need for separate dummy block structures, reducing device complexity while maintaining the protective function. The extraction principle separates the protection mechanism from the structural dummy blocks and integrates it directly into the trench geometry.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The fill pattern formed in the outermost trench serves multiple functions: it prevents mold leaning, provides structural support, and eliminates the need for separate dummy blocks. This multi-functional element combines the protective role previously requiring dummy blocks with the trench structure itself, reducing overall device complexity while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12604472B2Semiconductor device including stack structure and trenches
Publication Date: 2026.04.14 SAMSUNG ELECTRONICS CO LTD
  • US12604472B2 patent drawing
  • US12604472B2 patent drawing
  • US12604472B2 patent drawing

AI summary

A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.