3D Stacked Voltage Regulator for Higher Current Density
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Solution Overview
Problem
Existing voltage regulators face challenges in efficiently supplying power to computing devices due to increasing domain currents, which require higher input voltages and more current, while maintaining conversion efficiency.
Innovation Solution
The solution involves 3D stacking of multiple wafers and/or dice, including passive components like capacitors and inductors, and active components such as power transistors, control circuits, and signal generation circuits, to form parallel or cascaded voltage converters, thereby enhancing current capability and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional 2D voltage regulator design is used, then device complexity is low, but current capability and efficiency are insufficient
Solution Approach 1:
The patent transitions from traditional 2D planar voltage regulator design to 3D stacked architecture, where multiple regulator layers are vertically stacked and interconnected via through-silicon vias. This dimensional change enables increased current capability and power density without proportionally increasing footprint area, effectively resolving the contradiction between productivity and device complexity.
Solution Approach 2:
The voltage regulator system is segmented into multiple independent regulator layers, each capable of handling specific current loads. These segmented layers are distributed across different substrate areas and connected through vertical interconnects, allowing parallel current paths that enhance overall current capability while maintaining manageable complexity through modular design.
2Volume of stationary object
If passive components are concentrated on single die, then manufacturing is simple, but passive volume per unit area is limited
Solution Approach 1:
Passive components such as capacitors and inductors are distributed across multiple vertically stacked dies rather than concentrating them on a single die. This 3D distribution dramatically increases the total passive volume available per unit footprint area while maintaining manufacturing simplicity through standardized stacking and interconnection processes.
Solution Approach 2:
The passive component inventory is segmented and distributed across multiple regulator layers and dies. Each die contains a subset of the total passive components, and these segmented components are interconnected through vertical vias to form the complete voltage regulator system, achieving high passive volume density without complicating individual die manufacturing.
3Productivity
If transistor density is increased, then current capability improves, but heat generation and reliability issues worsen
Solution Approach 1:
The transistor population is segmented across multiple vertically stacked regulator layers. Each layer contains a subset of the total transistors, distributing the current handling load and associated heat generation across multiple physical locations. This segmentation maintains high overall current capability while improving reliability by preventing single-point thermal failure.
Solution Approach 2:
Transistors are arranged in 3D stacked layers rather than confined to a single 2D plane. This vertical distribution increases transistor density per unit footprint while spreading heat generation across multiple thermal zones, allowing better heat management and maintaining reliability even as current capability increases.
4Volume of stationary object
If 3D stacking of multiple wafers/dice is implemented, then passive volume and current capability increase, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into discrete stages: individual die fabrication, via formation and filling, die stacking, and interconnect establishment. Each segmentation step is independently optimized and standardized, allowing complex 3D structures to be built from simpler, well-controlled manufacturing steps, thereby managing overall manufacturing complexity.
Solution Approach 2:
Through-silicon vias are formed and filled with conductive material before the actual stacking process. This preliminary action prepares the interconnection pathways in advance, simplifying the subsequent stacking operation and reducing the complexity of real-time alignment and connection during assembly.
Data Source
AI summary
Embodiments herein relate to a voltage regular (VR) formed by components which are distributed over a stack of dice or wafers. Separate VRs can be provided in separate dice or wafers, where their outputs are coupled at an output path. A common control circuit can be used to control each VR. Passive components of a VR can be distributed on separate dice. For example, capacitors or inductors on the different dice or wafers can be coupled in parallel or in series, respectively. The stack can include dice or wafers of different types, such as silicon and Gallium Nitride. A first VR on a first type of die or wafer can be arranged in cascade with a second VR on a second type of die or wafer. The components in the different dice or wafers can be coupled by vias such as through-silicon vias.