Stadium Stack Structures for High-Density Vertical Memory Alignment
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Solution Overview
Problem
Conventional fabrication methods for vertical memory arrays in microelectronic devices result in undesirable defects that diminish performance, reliability, and durability due to increased feature packing densities and reduced formation margins.
Innovation Solution
The introduction of stadium structures and dielectric-filled slot structures in the stack configuration of microelectronic devices, which facilitate improved electrical connections and reduce defects by enhancing the structural integrity and alignment of conductive materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used for vertical memory arrays, then manufacturing process simplicity is maintained, but manufacturing precision deteriorates due to increased feature packing densities and reduced formation margins
Solution Approach 1:
The patent divides the stack structure into discrete blocks separated by dielectric-filled slot structures. Each block contains a controlled number of tiers (e.g., 8-16 tiers per block), which segments the overall high-density structure into manageable units. This segmentation allows for better control of fabrication processes within each block while maintaining high overall density, directly addressing the precision vs. complexity contradiction.
Solution Approach 2:
Dielectric-filled slot structures are introduced as intermediary elements between blocks of the stack structure. These slots provide physical separation and electrical isolation between adjacent blocks, serving as buffer zones that prevent defect propagation and facilitate more precise fabrication. The dielectric material fills the slots to provide mechanical support and electrical insulation, enabling higher packing density without compromising manufacturing precision.
2Productivity
If feature packing density is increased to improve integration density, then productivity is improved, but reliability deteriorates due to reduced margins for formation errors
Solution Approach 1:
By segmenting the stack into blocks with controlled tier counts (e.g., 8-16 tiers per block), the patent limits the cumulative impact of formation errors within each segment. Even if defects occur, they are contained within individual blocks rather than propagating through the entire high-density stack, thereby maintaining reliability while achieving high integration density through increased block count.
Solution Approach 2:
Dielectric-filled slot structures serve as preventive cushioning elements between blocks. These slots are designed with sufficient width and dielectric material thickness to provide a safety margin that cushions against potential defect propagation and formation variations. This beforehand cushioning ensures that even with increased packing density, the device maintains adequate reliability margins.
3Manufacturing precision
If conventional staircase structures are used for electrical connections, then device complexity is minimized, but manufacturing precision deteriorates due to alignment difficulties at high packing densities
Solution Approach 1:
Dielectric-filled slot structures serve as intermediary reference structures that facilitate precise alignment of electrical connections. The slots provide well-defined geometric features and electrical isolation boundaries that serve as alignment references during fabrication, improving manufacturing precision for contact formation and via alignment in high-density configurations.
Solution Approach 2:
The patent applies different structural configurations to different regions: blocks contain the active stack tiers with conductive structures, while dielectric-filled slots provide isolation and alignment references. This local differentiation optimizes each region for its specific function, with blocks optimized for electrical connectivity and slots optimized for alignment and isolation, thereby improving overall manufacturing precision.
Data Source
AI summary
A microelectronic device includes a stack structure divided into blocks, dielectric-filled slot structures, and further dielectric-filled slot structures. The stack structure includes tiers of conductive and insulative structures. A block includes a stadium structure, a crest region, and bridge regions. A first group of the dielectric-filled slot structures extends in a first direction and terminates within the stadium structure. A second group of the dielectric-filled slot structures extends in the first direction across the stadium structure and terminates within the crest region. The further dielectric-filled slot structures extends in a second direction partially into the crest region. The further dielectric-filled slot structures the second group of the additional dielectric-filled slot structures within the crest region. The dielectric-filled slot structures and the further dielectric-filled slot structures extend vertically through upper tiers of the sack structure. A memory device and an electronic system are also described.