Staggered Die Stack for Wire Bonding Access

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Solution Overview

Problem

Conventional semiconductor die stack configurations face challenges such as increased footprint, electrical shorting, and reduced assembly yield due to complex wiring requirements, especially in high-density stacks, and exposure of wire bonds in irregularly shaped packages.

Innovation Solution

A die stack arrangement with staggered and offset die placement allows for efficient wire bonding by interspersing two groups of die, minimizing wire length and preventing electrical shorts, and using staggered die placement to ensure all wire bonds lie within the package outline, even in irregularly shaped packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If die are stacked in an offset configuration to provide convenient access to bond pads, then wire bonding ease is improved, but footprint on substrate increases

Engineering Contradiction:
Improvewire bonding easeVSAvoidfootprint on substrate
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent transitions from a conventional 2D planar arrangement to a 3D stacked configuration with staggered die. By utilizing the vertical dimension and staggering die at different heights, the patent achieves convenient wire bonding access without proportionally increasing the substrate footprint, as the offset is distributed across multiple vertical layers rather than requiring extensive horizontal space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs a nested arrangement where die are stacked vertically in layers, with each layer containing staggered die. This nesting approach allows multiple die to occupy a compact vertical space while maintaining offset configurations for wire bonding access, effectively reducing the overall footprint compared to a purely horizontal offset arrangement.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If die are stacked in an aligned configuration to reduce footprint, then footprint on substrate is reduced, but space for wire bonds must be provided between adjacent die increasing height

Engineering Contradiction:
Improvefootprint on substrateVSAvoidheight of die stack
Core Design Contradiction:
Area of stationary objectVSLength of stationary object

Solution Approach 1:

Instead of resolving the wire bond space requirement by increasing height in a purely vertical alignment, the patent utilizes the lateral dimension by staggering die horizontally within each layer. This allows wire bonds to be routed more efficiently without requiring excessive vertical clearance, thereby reducing the overall height while maintaining compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the die stack into multiple layers with staggered arrangements. By dividing the stack into discrete layers where die are offset horizontally, the patent creates dedicated wire bonding paths that do not require additional vertical space, thus reducing the overall height of the die stack while maintaining adequate bonding access.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If wire bonds are made diagonally or additional substrate contact pads are required for high-density stacks, then wiring capability is improved, but device complexity increases

Engineering Contradiction:
Improvewiring capabilityVSAvoidwiring complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent utilizes the vertical dimension by staggering die at different heights within the stack. This 3D arrangement allows wire bonds to connect to bond pads on staggered die without requiring diagonal routing or additional contact pads, as the vertical offset provides natural bonding paths. This reduces wiring complexity while maintaining high-density stacking capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Ease of manufacture

If conventional die stack configurations are used, then manufacturing simplicity is maintained, but assembly yield decreases due to electrical shorts and complex wiring

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidassembly yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

By staggering die vertically in a 3D configuration, the patent creates natural spatial separation between wire bonds connecting to different die. This vertical staggering prevents wire bonds from intersecting and causing electrical shorts, thereby improving assembly yield while maintaining manufacturing simplicity through a systematic arrangement that is straightforward to implement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent proactively prevents electrical shorts by pre-arranging die in a staggered configuration before wire bonding. This preliminary spatial arrangement ensures that wire bonds to staggered die do not intersect with bonds to other die, eliminating the risk of electrical shorts before the bonding process occurs and thereby improving assembly yield.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces cycle time, increases assembly yield, and ensures all wire bonds are encapsulated within the package, addressing the limitations of conventional configurations while maintaining high-density die stacking.

Implementation Method 1

Wire bonds 30 are thermosonically welded between the die bond pads of the semiconductor die 22 and the contact pads of the substrate 26 to electrically couple the semiconductor die to the substrate

Methodology Applied
Scientific EffectThermosonic welding:

Data Source

PatentUS8853863B2Semiconductor device with die stack arrangement including staggered die and efficient wire bonding
Publication Date: 2014.10.07 SANDISK TECHNOLOGIES LLC
  • US8853863B2 patent drawing
  • US8853863B2 patent drawing
  • US8853863B2 patent drawing

AI summary

A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package.