Staggered Dummy Line Patterns for Photolithography Interference

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Solution Overview

Problem

Conventional semiconductor line patterns experience interference issues during photolithography, leading to deformation and electrical shorts due to light interference and uneven photoresist pattern formation, particularly when cutting regions are aligned in a straight line.

Innovation Solution

The introduction of dummy line patterns with staggered cutting regions and sub-line patterns, where one cutting region is aligned with and bounded by adjacent sub-line patterns, reduces light interference and allows for more uniform photoresist pattern formation, preventing deformation and electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If cutting regions are aligned in a straight line to define line patterns, then the manufacturing process is simplified, but light interference occurs during photolithography causing photoresist pattern deformation

Engineering Contradiction:

Improvephotoresist pattern formationVSAvoidline pattern width and spacing

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces dummy line patterns with asymmetric positioning relative to the cutting regions. Specifically, dummy line patterns are placed only on one side of the cutting regions rather than symmetrically on both sides, creating an asymmetric configuration that disrupts the light interference pattern and prevents notching deformation in the photoresist patterns.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The dummy line patterns serve as intermediary elements between the cutting regions and the active line patterns. These dummy patterns act as light-blocking mediators that interfere with the light paths causing interference, thereby protecting the photoresist patterns from deformation while maintaining the desired cutting region alignment.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If high exposure energy is used during photolithography, then the exposure process is faster, but notching phenomenon occurs on photoresist patterns adjacent to cutting regions

Engineering Contradiction:

Improveexposure process speedVSAvoidphotoresist pattern shape

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The dummy line patterns are positioned in advance to counteract the harmful light interference effects before the actual photoresist patterning occurs. By pre-placing these dummy patterns adjacent to cutting regions, the patent creates a protective configuration that prevents notching deformation even when high exposure energy is used for faster processing.

Inventive Principle:

Principle #9Preliminary anti-action

3Manufacturing precision

If low exposure energy is used during photolithography, then photoresist pattern deformation is reduced, but residues remain between photoresist patterns causing electrical shorts

Engineering Contradiction:

Improvephotoresist pattern shapeVSAvoidelectrical isolation between line patterns

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The asymmetric placement of dummy line patterns creates an optimized light distribution pattern during exposure. This asymmetric configuration ensures that sufficient light energy reaches the photoresist patterns to achieve complete exposure and prevent residues, while the dummy patterns themselves block the interfering light paths that would cause notching, thus resolving the contradiction between pattern shape precision and electrical isolation reliability.

Inventive Principle:

Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the accuracy and uniformity of sub-line pattern formation, reducing the occurrence of interference phenomena and ensuring consistent line pattern widths and spacings, thereby improving the reliability of semiconductor devices.

Implementation Method 1

When exposing the cutting regions 15 to light during an exposure step of a photolithography process, interference in the light pattern may result along the adjacent cutting regions 15

Methodology Applied

Scientific EffectLight interference: Interference

Data Source

PatentUS7898007B2Semiconductor devices including line patterns separated by cutting regions

Publication Date: 2011.03.01 SAMSUNG ELECTRONICS CO LTD

AI summary

Semiconductor devices are provided. A semiconductor device can include a substrate and a plurality of dummy line patterns on the substrate that extend in a first direction parallel with one another. Each of the dummy line patterns can include a plurality of sub-line patterns aligned along the first direction and which are separated from each other by at least one cutting region therebetween. The dummy line patterns can include first and second dummy line patterns which are adjacent to each other in a second direction that is perpendicular to the first direction. At least one of the cutting regions between a pair of sub-line patterns of the first dummy line pattern is aligned with and bounded by one of the sub-line patterns of the second dummy line pattern in the second direction.