Staggered Shared Pixel Readout Layout for Symmetric Photoresponse
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional shared pixel architectures in image sensors suffer from asymmetrical pixel configurations, leading to inconsistent photoresponse and modulation transfer function (MTF), which are not suitable for applications requiring symmetry and high yield due to susceptibility to defects in control lines.
Innovation Solution
A staggered shared pixel array design where readout circuitry is shared between adjacent photodiodes, with each instance of the readout circuitry being offset by one column and one row, reducing the overall readout circuitry requirements and capacitance, and incorporating redundancy to improve resilience to defects and maintain symmetry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If photodiodes share readout circuitry in a conventional architecture, then the number of readout circuitry instances is reduced, but the pixel configuration becomes asymmetrical leading to inconsistent photoresponse and MTF
Solution Approach 1:
The patent intentionally introduces asymmetry in the form of dummy structures (dummy transfer gate, dummy reset transistor, dummy buffer amplifier) to compensate for the asymmetry caused by shared readout circuitry. This creates a symmetrical overall layout that ensures consistent photoresponse and MTF across all pixels while maintaining the benefits of circuit sharing.
Solution Approach 2:
The patent applies different structures to different locations: pixels sharing readout circuitry receive dummy structures to balance their local characteristics, while ensuring that each pixel's local environment is optimized for consistent performance. This local customization achieves global uniformity in photoresponse.
2Area of stationary object
If photodiodes share readout circuitry, then area for photodiodes increases, but asymmetrical configuration causes inconsistent MTF
Solution Approach 1:
Dummy structures are added to create symmetry in the overall pixel configuration, ensuring that MTF consistency is maintained across all pixels even though the readout circuitry is shared and the physical layout appears asymmetric. This compensates for the imbalance and stabilizes the optical characteristics.
Solution Approach 2:
The patent modifies the physical layout parameters by introducing dummy structures that change the symmetry parameters of the pixel configuration. This ensures that optical parameters such as MTF remain consistent across all pixels while maximizing the area available for photodiodes.
3Area of stationary object
If conventional shared pixel architecture is used, then fill factor improves, but asymmetrical layout causes varying photoresponse
Solution Approach 1:
The patent introduces dummy structures (dummy transfer gate, dummy reset transistor, dummy buffer amplifier) to compensate for the asymmetry in shared pixel architecture. This creates a symmetrical overall configuration that ensures uniform photoresponse across all pixels while maintaining the high fill factor achieved through circuit sharing.
Solution Approach 2:
Each pixel sharing readout circuitry is provided with locally-specific dummy structures that balance its particular asymmetry. This local quality adjustment ensures that all pixels, despite their different positions in the shared architecture, exhibit uniform photoresponse characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The staggered shared pixel architecture achieves symmetric pixel layouts, higher speed, lower power consumption, improved yield, and consistent photoresponse across all pixels, while reducing the risk of defects affecting entire rows and enhancing fill factor and electro-optical performance.
Implementation Method 1
photocharge is accumulated by the photodiode PD
Data Source
AI summary
A pixel array comprises a plurality of photo-sensitive elements arranged in rows and columns and readout circuitry for reading a value of a photo-sensitive element. Shared readout circuitry is provided for a pair of adjacent photo-sensitive elements. Adjacent instances of the shared readout circuitry are staggered with respect to one another. For a layout having shared readout circuitry for a pair of photo-sensitive elements, adjacent instances of the shared readout circuitry are offset by a horizontal distance of one column and a vertical distance of one row of the array. The shared readout circuitry can serve a pair of adjacent photo-sensitive elements in a row or column of the array, or a pair of photo-sensitive elements which are diagonally adjacent in the array. An improved yield and symmetry results from staggering instances of the shared readout circuitry.


