Stair-Shaped 3D Memory Stack Hard Mask Etching

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The existing methods for forming stair-shaped stacks in three-dimensional semiconductor memory devices require repeated photoresist application, leading to inefficiencies and high process complexity, especially when forming stacks with a large number of layers, as the photoresist often disappears after several etching cycles.

Innovation Solution

A method involving a hard mask with multiple layers of different materials is used, where a photoresist is applied and etched in conjunction with the hard mask and stack, allowing for the formation of stair-shaped structures with reduced photoresist consumption by changing etching conditions, thereby increasing the number of layers without deteriorating throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of layers of the stack is increased to enhance integration degree, then the integration degree is improved, but the photoresist disappears after several etching cycles requiring frequent reapplication

Engineering Contradiction:

Improvenumber of layersVSAvoidprocess time

Core Design Contradiction:

Quantity of substanceVSLoss of time

Solution Approach 1:

The patent applies a thick photoresist layer (5-10 μm) in advance before the etching process begins. This preliminary application of sufficient photoresist thickness allows the photoresist to withstand multiple etching cycles (forming 128 or more layers) without disappearing, eliminating the need for frequent reapplication and reducing total process time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes the thickness parameter of the photoresist from conventional thin layers to a thick layer of 5-10 μm. This parameter change enables the photoresist to maintain its protective function throughout the entire etching process for high-layer-count stacks, resolving the contradiction between increasing layer count and reducing process time.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If conventional photoresist application method is used, then the process is simple, but the photoresist is depleted after several etching cycles requiring twenty times or more application for 128 layers

Engineering Contradiction:

Improveprocess simplicityVSAvoidthroughput

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The patent increases the photoresist thickness parameter to 5-10 μm, which allows a single photoresist application to cover the entire etching process for 128 layers. This maintains process simplicity while dramatically improving productivity by reducing the number of application cycles from twenty or more to just one or two.

Inventive Principle:

Principle #35Parameter changes

3Duration of action of stationary object

If the photoresist thickness is increased to prevent disappearance, then the photoresist durability is improved, but the trimming process complexity increases

Engineering Contradiction:

Improvephotoresist durabilityVSAvoidprocess complexity

Core Design Contradiction:

Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies different etching conditions to different regions of the photoresist. The lower portion of the thick photoresist (near the stack) undergoes trimming at slower rates, while the upper portion is trimmed at faster rates. This local differentiation of etching quality enables precise stair formation while maintaining overall photoresist durability throughout the process.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient manufacturing of three-dimensional semiconductor memory devices with increased layer counts without frequent photoresist application, maintaining high throughput and accuracy, and prevents photoresist depletion during the etching process.

Implementation Method 1

the uppermost layer of the stack on which no photoresist is applied is removed by anisotropic etching

Methodology Applied

Scientific EffectAnisotropic etching:

Implementation Method 2

isotropic etching is performed so that the end on the stair side of the photoresist retreats by a given length

Methodology Applied

Scientific EffectIsotropic etching:

Implementation Method 3

Etching of the photoresist, the hard mask, and the stack are repeated while changing etching conditions

Methodology Applied

Scientific EffectDifferential etching:

Data Source

PatentUS11501998B2Method for manufacturing three-dimensional semiconductor memory device

Publication Date: 2022.11.15 TOKYO ELECTRON LTD

AI summary

There is formed, on a stack formed by alternately stacking an oxide film and a nitride film or an oxide film and a polysilicon film on a substrate, a hard mask in which two or more kinds of lines made of mutually different materials are arranged in order. Then, a photoresist is applied onto the hard mask. Furthermore, the photoresist is trimmed until one line is exposed from the end of the hard mask. Moreover, one line of the hard mask exposed beneath the photoresist is etched. Furthermore, a part of the stack exposed beneath the hard mask is etched. The etching of the photoresist, the hard mask, and the stack is repeated while changing etching conditions.