Staircase Contact Structure for 3D Memory

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Solution Overview

Problem

In three-dimensional semiconductor memory devices, the existing replacement processes face challenges such as increased contact resistance due to oxidation of conductive layers and difficulty in completely filling conductive material up to the tip end of the staircase portion, leading to potential short circuits and increased wiring resistance as the number of stacked bodies increases.

Innovation Solution

The semiconductor memory device incorporates a contact structure with a conductive layer extending from the staircase portion to the word line, integrated with the word line, and uses a liner layer with selectivity in dry etching to form contact holes with different depths, along with a barrier metal layer that continuously covers the side walls, reducing contact resistance and preventing short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If contact holes are formed to reach conductive layers in the staircase portion, then electrical connection to conductive layers is achieved, but contact resistance increases due to oxidation of conductive layers

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidoxidation of conductive layers
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A liner layer is introduced as an intermediary between the conductive layer and the contact hole. The liner layer prevents oxidation of the conductive layer while enabling electrical connection through the contact hole. This mediator protects the conductive layer from harmful oxidation effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The liner layer creates an inert environment around the conductive layer surface, preventing oxygen from reaching and oxidizing the conductive material. This protective barrier maintains the conductive layer in a non-oxidized state while still allowing electrical connection.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Ease of manufacture

If replacement process is performed via slit to form conductive layers, then stacked body structure is created, but conductive material cannot be completely filled up to the tip end of the staircase portion

Engineering Contradiction:
Improvestacked body formationVSAvoidfilling completeness of conductive material
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The liner layer is formed in advance before the conductive material filling process. This preliminary action prepares the surface and creates a template that guides the conductive material to fill completely up to the tip end of the staircase portion, ensuring manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The liner layer acts as a mediator that enables complete filling of conductive material by providing a protective interface and surface guidance. It allows the conductive material to reach the tip end of the staircase portion without defects.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If the number of stacked bodies is increased to enhance memory capacity, then storage capacity improves, but wiring resistance increases and short circuits become more difficult to prevent

Engineering Contradiction:
Improvememory capacityVSAvoidwiring resistance and short circuit prevention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The structure is segmented into multiple stacked bodies, each with its own liner layer protection. This segmentation allows independent protection of each conductive layer stack, preventing short circuits between layers while maintaining low wiring resistance through controlled interfaces.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The liner layer serves as a protective intermediary in each stacked body, preventing oxidation and short circuits at the conductive layer interfaces. This mediator ensures reliable electrical connection even as the number of stacked bodies increases.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If contact holes are formed with uniform depth, then manufacturing process is simplified, but connections to non-target conductive layers may occur causing short circuits

Engineering Contradiction:
Improvecontact hole formation processVSAvoidcontact hole depth control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The liner layer provides local quality differentiation, allowing contact holes to be formed with uniform depth while the liner layer itself varies in thickness or presence to control the actual connection depth. This ensures precise connections to target conductive layers without short circuits.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The liner layer acts as a mediator that decouples the contact hole depth from the actual electrical connection depth. Uniform depth contact holes can be formed easily, while the liner layer controls the precise connection point to prevent short circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces contact resistance and ensures reliable filling of conductive material up to the tip end of the staircase portion, preventing connections to non-target conductive layers and short circuits, thereby enhancing the performance and reliability of the semiconductor memory device.

Implementation Method 1

a liner layer with selectivity in dry etching to form contact holes with different depths

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS20230189523A1Semiconductor memory device and method of manufacturing semiconductor memory device
Publication Date: 2023.06.15 KIOXIA CORP
  • US20230189523A1 patent drawing
  • US20230189523A1 patent drawing
  • US20230189523A1 patent drawing

AI summary

A semiconductor memory device according to an embodiment includes: a stacked body in which a plurality of first conductive layers and a plurality of first insulating layers are stacked alternatively, the stacked body including a staircase portion obtained by processing the plurality of first conductive layers in a staircase pattern; a pillar extending in a stacking direction of the stacked body in the stacked body away from the staircase portion in a first direction intersecting the stacking direction; and a contact disposed in the staircase portion and connected to one first conductive layer out of the plurality of first conductive layers, in which the contact includes a second conductive layer extending from above the staircase portion to the one first conductive layer and integrated with the one first conductive layer.