Standard Cell Layout With 2D Conductor Routing for Smaller ICs
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Solution Overview
Problem
The miniaturization of integrated circuits poses challenges in design and manufacturing, requiring stricter specifications and reliability, while existing electronic design automation tools struggle to optimize standard cell layout designs effectively.
Innovation Solution
The integration of a conductor extending in two directions, overlapping with contacts, gates, and conductive lines, provides additional routing resources, reducing area, enhancing flexibility, and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional routing methods are used in standard cell layout, then design simplicity is maintained, but routing flexibility and area efficiency deteriorate
Solution Approach 1:
The conductor is configured to extend in two directions (first direction and second direction perpendicular to the first direction) within the standard cell layout. This two-dimensional conductor structure enables routing connections in multiple directions, significantly improving routing flexibility while maintaining area efficiency by utilizing spatial dimensions more effectively
Solution Approach 2:
The conductor serves multiple functions simultaneously: it acts as a routing element for signal transmission, provides structural support within the standard cell, and enables connections to multiple contacts (first contact and second contact) positioned at different locations. This multi-functionality reduces the need for separate dedicated structures for each function
2Weight of stationary object
If miniaturization is pursued to reduce device size, then power consumption decreases, but manufacturing precision and reliability requirements worsen
Solution Approach 1:
The conductor is divided into multiple segments or portions, with at least a first portion extending in the first direction and a second portion extending in the second direction. This segmentation allows each portion to be optimized independently for its specific routing function, improving manufacturability and precision while maintaining overall compactness
Solution Approach 2:
The conductor configuration is optimized locally at different positions within the standard cell. The first portion is positioned to connect with the first contact, while the second portion connects with the second contact, with each local configuration tailored to meet specific routing requirements and manufacturing constraints
Data Source
AI summary
An integrated circuit includes a first source/drain region of a first transistor on a first level of a substrate, a first gate of the first transistor on a second level, a first conductive line overlapping the first gate, and on a third level, a first input pin overlapping the first source/drain region, the first gate and the first conductive line, and on a fourth level, and a first via between the first gate and the first conductive line. The first via electrically coupling the first gate and the first conductive line together. The first input pin includes a first conductive portion extending in the first direction, and overlapping at least the first gate.


