1.5× Standard Cell Layout for Higher OD Density
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Solution Overview
Problem
The challenge in semiconductor device design is optimizing layout diagrams for higher cell density while adhering to design rules that prevent certain circuit regions from being placed adjacent to each other, leading to performance degradation due to the need for dummy OD regions.
Innovation Solution
Introducing a 1.5× height standard cell structure that allows direct abutment with standard cell structures of different heights and OD widths, reducing the use of dummy areas and increasing the total surface area of active OD regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard cell structures are arranged according to design rules preventing certain circuit regions from being placed adjacent to each other, then device reliability is improved, but cell density decreases due to the need for dummy OD regions
Solution Approach 1:
The standard cell structure is segmented into multiple OD regions (first OD region and second OD region) with different widths, allowing each segment to be independently configured. This segmentation enables the cell to meet design rules while maximizing active area utilization, thereby improving cell density without compromising reliability.
Solution Approach 2:
Different OD regions within the same standard cell are assigned different widths based on local requirements. The first OD region has a first width and the second OD region has a second width, allowing each region to be optimized for its specific function. This local quality approach eliminates the need for uniform dummy regions, increasing overall cell density while maintaining reliability.
2Reliability
If dummy OD regions are introduced to satisfy design rules, then device reliability is improved, but the total surface area of active OD regions decreases
Solution Approach 1:
The invention changes the width parameter of OD regions within the standard cell structure. By configuring the first OD region with a first width and the second OD region with a second width, the design optimizes the distribution of active OD area. This parameter change eliminates or reduces the need for dummy OD regions, thereby increasing the total surface area of active OD regions while maintaining the reliability benefits of proper circuit region separation.
Data Source
AI summary
A semiconductor device comprising active areas on substrate and arranged relative to an imaginary grid having first and second imaginary reference lines parallel to corresponding orthogonal first and second directions, the active areas are organized into instances of a first row having first conductivity and instances of a second row having second conductivity, each instance of first and second rows comprises a pre-determined number of first imaginary reference lines. The device includes a first cell region having a first instance of first row of the active area, and a second cell region having a first instance of second row of the active area, wherein the second cell region contacts the first cell region, and each first and second cell region has a first and second height, respectively, and a sum of first and second heights along the second direction represents a unit height of 1.5 times on the imaginary grid.