Standard SRAM DRAM Cells for Sum-of-Products Logic
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Solution Overview
Problem
Existing computing memory arrays, particularly Content Addressable Memory (CAM), rely on custom-designed cells that do not leverage advancements in standard Random Access Memory (RAM) technologies, leading to inefficiencies and larger cell sizes, and lack the ability to efficiently perform sum-of-products and majority logic functions.
Innovation Solution
The use of standard or slightly modified SRAM and DRAM cells as basic building blocks for memory arrays, enabling concurrent evaluation of sum-of-products and majority logic functions by introducing input vectors on read/write lines and employing modified sense amplifiers to sense voltage levels on bit lines, while maintaining standard RAM functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If custom-designed cells are used for computing memory arrays, then high performance is achieved, but the approach does not take advantage of technological progress in standard RAM and leads to larger cell sizes
Solution Approach 1:
The patent makes standard SRAM/DRAM cells perform multiple functions: they serve as both storage elements and comparison elements. By applying input vectors to the read/write lines and using the bit line voltage levels to indicate match/mismatch results, the same cell structure that stores data also performs comparison operations, eliminating the need for separate custom-designed comparison circuits.
Solution Approach 2:
The invention merges the storage function and comparison function into a single integrated cell structure. Standard memory cells that were previously used only for storage are now combined with comparison logic by utilizing the existing bit lines and sense amplifiers to detect matches between stored vectors and input vectors, reducing overall cell size and leveraging standard RAM technology advances.
2Adaptability or versatility
If custom-designed cells are used for computing memory arrays, then comparison functionality is achieved, but standard RAM technological progress is not leveraged
Solution Approach 1:
Standard SRAM and DRAM cells are made universal by enabling them to perform both storage and comparison operations. The same read/write lines that are used for data access are utilized to input comparison vectors, and the bit lines naturally indicate comparison results through their voltage levels, allowing standard RAM technology to be directly applied to computing memory array manufacturing.
Solution Approach 2:
The standard memory cell structure serves itself for comparison operations without requiring external custom-designed comparison circuits. The bit lines, which naturally respond to stored data during read operations, are utilized to indicate match/mismatch results, allowing the cell to perform comparison functionality inherently through its existing structure and operation modes.
3Area of stationary object
If standard RAM cells are used for computing memory arrays, then denser arrays and smaller cell sizes are achieved, but the ability to efficiently perform sum-of-products and majority logic functions must be enabled
Solution Approach 1:
The comparison operation is segmented into distinct phases: precharging bit lines, applying input vectors to selected word lines, sensing voltage levels for match detection, and evaluating sum-of-products functions. This segmentation allows standard memory cells to efficiently perform complex logic functions by breaking down the operations into manageable steps that leverage the inherent parallelism of the memory array structure.
Solution Approach 2:
The patent utilizes the voltage dimension of bit lines to encode comparison results. By interpreting voltage levels on bit lines (high voltage indicating match, low voltage indicating mismatch), the system adds a functional dimension to the standard memory cell operation, enabling sum-of-products and majority logic evaluations without requiring additional physical cells or complex circuitry.
Data Source
AI summary
Standard memory circuits are used for executing a sum-of-products function between data stored in the memory and data introduced into the memory. The sum-of-products function is executed in a manner substantially similar to a standard memory read operation. The memory circuits are standard or slightly modified SRAM and DRAM cells, or computing memory arrays (CAMs).